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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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MRF89XA Arkusz danych(PDF) 29 Page - Microchip Technology |
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MRF89XA Arkusz danych(HTML) 29 Page - Microchip Technology |
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29 / 140 page  2010-2017 Microchip Technology Inc. Preliminary DS70000622D-page 29 MRF89XA Receiver Configuration Registers: Size – 6 Bytes, Start Address – 0x14 Register Address Register Name Register Description Related Control Functions 0x14 RSTSREG RSSI Status Read Register RSSI output 0x15 OOKCREG OOK Configuration Register RSSI threshold size in OOK demodulator, RSSI threshold period in OOK demodulator, cut-off frequency of the OOK threshold in demodulator Sync Word Configuration Registers: Size – 4 Bytes, Start Address – 0x16 Register Address Register Name Register Description Related Control Functions 0x16 SYNCV31REG Sync Value 1st Byte Configuration Register Configuring first byte of the 32-bit Sync Word 0x17 SYNCV23REG Sync Value 2nd Byte Configuration Register Configuring second byte of the 32-bit Sync Word 0x18 SYNCV15REG Sync Value 3rd Byte Configuration Register Configuring third byte of the 32-bit Sync Word 0x19 SYNCV07REG Sync Value 4th Byte Configuration Register Configuring fourth byte of the 32-bit Sync Word Transmitter Configuration Registers: Size – 1 Byte, Start Address – 0x1A Register Address Register Name Register Description Related Control Functions 0x1A TXCONREG Transmit Configuration Register Transmit interpolation cut-off frequency, power output Oscillator Configuration Registers: Size – 1 Byte, Start Address – 0x1B Register Address Register Name Register Description Related Control Functions 0x1B CLKOREG Clock Output Control Register Clock-out control, frequency Packet Handling Configuration Registers: Size – 4 Bytes, Start Address – 0x1C Register Address Register Name Register Description Related Control Functions 0x1C PLOADREG Payload Configuration Register Enable Manchester encoding/decoding, payload length 0x1D NADDSREG Node Address Set Register Node’s local address for filtering of received packets 0x1E PKTCREG Packet Configuration Register Packet format, size of the preamble, whitening, CRC on/off, address filtering of received packets, CRC status 0x1F FCRCREG FIFO CRC Configuration Register FIFO auto-clear (if CRC failed), FIFO access TABLE 2-6: CONFIGURATION/CONTROL/STATUS REGISTER DESCRIPTION (CONTINUED) |
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