ATWILC1000B-MUT [DATASHEET]

Atmel-42491B-ATWILC1000B-MUT_Datasheet_03/2016

2

6

26

Table 8-9.

SDIO Interface Pin Mapping

Pin #

SPI function

9

CFG: Must be tied to ground

12

DAT3: Data 3

13

DAT2: Data 2

16

DAT1: Data 1

17

DAT0: Data 0

18

CMD: Command

19

CLK: Clock

When the SDIO card is inserted into an SDIO aware host, the detection of the card will be via the means

described in SDIO specification. During the normal initialization and interrogation of the card by the host, the

card will identify itself as an SDIO device. The host software will obtain the card information in a tuple (linked

list) format and determine if that card’s I/O function(s) are acceptable to activate. If the card is acceptable, it will

be allowed to power up fully and start the I/O function(s) built into it.

The SD memory card communication is based on an advanced 9-pin interface (Clock, Command, four Data,

and three Power lines) designed to operate at maximum operating frequency of 50MHz.

The SDIO Slave interface has the following features:



Meets SDIO card specification version 2.0



Host clock rate variable between 0 and 50MHz



1 bit/4-bit SD bus modes supported



Allows card to interrupt host



Responds to Direct read/write (IO52) and Extended read/write (IO53) transactions



Supports Suspend/Resume operation

The SDIO Slave interface timing is provided in Figure 8-5 and Table 8-10.

Figure 8-5.

SDIO Slave Timing Diagram

SD_CLK

Inputs

Outputs

Table 8-10.

SDIO Slave Timing Parameters

Parameter

Symbol

Min.

Max.

Units

Clock Input Frequency

0

50

MHz

Clock Low Pulse Width

10

ns