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SLG46169 Arkusz danych(PDF) 85 Page - Dialog Semiconductor |
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SLG46169 Arkusz danych(HTML) 85 Page - Dialog Semiconductor |
85 / 102 page 000-0046169-105 Page 84 of 101 SLG46169 reg<461:456> Reserved reg<467:462> Reserved reg<473:468> Reserved reg<479:474> Reserved reg<485:480> Reserved reg<491:486> Reserved reg<497:492> Matrix Out Pin10 Digital Output Source reg<503:498> Matrix Out Pin10 Output Enable reg<509:504> Matrix Out Pin11 Digital Output Source reg<515:510> Matrix Out Pin12 Digital Output Source reg<521:516> Matrix Out Pin12 Output Enable reg<527:522> Matrix Out Pin13 Digital Output Source reg<533:528> Matrix Out Pin13 Output Enable reg<539:534> Matrix Out Pin14 Digital Output Source reg<545:540> Matrix Out Input of INV_0 reg<551:546> Matrix Out Input of INV_1 reg<556:552> Reserved reg<558:557> Reserved reg<560:559> Reserved reg<561> Reserved reg<562> Reserved reg<563> Reserved reg<564> VDD bypass enable 0: Regulator auto on 1: Regulator off (VDD bypass) reg<566:565> OSC clock pre-divider 00: Div1 01: Div2 10: Div4 11: Div8 reg<568:567> Reserved Reserved reg<569> Analog buffer at ACMP0 enable 0: Disable analog buffer 1: Enable analog buffer reg<570> Analog buffer at ACMP1 enable 0: Disable analog buffer 1: Enable analog buffer Register Bit Address Signal Function Register Bit Definition |
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