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SLG46532 Arkusz danych(PDF) 72 Page - Dialog Semiconductor |
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SLG46532 Arkusz danych(HTML) 72 Page - Dialog Semiconductor |
72 / 184 page SLG46532_DS_108 Page 71 of 183 SLG46532 The table below shows the register bits for the standard digital logic devices (AND, NAND, OR, NOR, XOR, XNOR) that can be created within each of the six 3-bit LUT logic cells. 9.4.2 3-Bit LUT or D Flip Flop Macrocells Used as D Flip Flop Register Settings Table 55. 3-bit LUT Standard Digital Functions Function MSB LSB AND-3 1 000 00 00 NAND-3 0 111 11 11 OR-3 1 111 11 10 NOR-3 0 000 00 01 XOR-3 1 001 01 10 XNOR-3 0 110 10 01 Table 56. DFF3 Register Settings Signal Function Register Bit Address Register Definition LUT3_0 or DFF3 Select reg<1187> 0: LUT3_0 1: DFF3 DFF3 Initial Polarity Select reg<1220> 0: Low 1: High DFF3 nRST/nSET Select reg<1221> 1: nSET from matrix out 0: nRST from matrix out DFF3 Output Select reg<1222> 0: Q output 1: nQ output DFF3 or Latch Select reg<1223> 0: DFF function 1: Latch function Table 57. DFF4 Register Settings Signal Function Register Bit Address Register Definition LUT3_1 or DFF4 Select reg<1186> 0: LUT3_1 1: DFF4 DFF4 Initial Polarity Select reg<1128> 0: Low 1: High DFF4 nRST/nSET Select reg<1129> 1: nSET from matrix out 0: nRSTfrom matrix out DFF4 Output Select reg<1130> 0: Q output 1: nQ output DFF4 or Latch Select reg<1131> 0: DFF function 1: Latch function |
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