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SLG46533 Arkusz danych(PDF) 42 Page - Dialog Semiconductor |
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SLG46533 Arkusz danych(HTML) 42 Page - Dialog Semiconductor |
42 / 185 page SLG46533_DS_114 Page 41 of 184 SLG46533 7.6.2 Matrix OE IO Structure (for IOs 6 and 7) Figure 4. Matrix OE IO Structure Diagram PAD 10 k 90 k 900 k Res_sel[1:0] 00: floating 01: 10 k 10: 100 k 11: 1 M IO6, IO7 Mode [2:0] 000: Digital Input without Schmitt Trigger 001: Digital Input with Schmitt Trigger 010: Low Voltage Digital Input 011: Reserved 100: Reserved 101: Open Drain NMOS 110: Reserved 111: Reserved Note: Digital Out and OE are Matrix output, Digital In is Matrix input Digital Out OE od1x_en Digital In Low Voltage Input Non-Schmitt Trigger Input OE lv_en Shmitt Trigger Input OE smt_en OE wosmt_en |
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