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AM29DS163DT120WAK Arkusz danych(PDF) 5 Page - Advanced Micro Devices |
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AM29DS163DT120WAK Arkusz danych(HTML) 5 Page - Advanced Micro Devices |
5 / 50 page Am29DS163D 5 ADV ANCE I N FO RMAT I O N TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10 Table 1. Am29DS163D Device Bus Operations .............................10 Word/Byte Configuration ........................................................ 10 Requirements for Reading Array Data ................................... 10 Writing Commands/Command Sequences ............................ 11 Accelerated Program Operation ......................................................11 Autoselect Functions .......................................................................11 Simultaneous Read/Write Operations with Zero Latency ....... 11 Standby Mode ........................................................................ 11 Automatic Sleep Mode ........................................................... 12 RESET#: Hardware Reset Pin ............................................... 12 Output Disable Mode .............................................................. 12 Table 2. Am29DS163D Device Bank Divisions ...............................12 Table 3. Top Boot Sector Addresses (Am29DS16xDT) ..................13 SecSi Sector Addresses for Top Boot Devices.............................. 13 Table 5. Bottom Boot Sector Addresses (Am29DS16xDB) ............14 SecSi Sector Addresses for Bottom Boot Devices......................... 14 Autoselect Mode ..................................................................... 15 Table 7. Am29DS163D Autoselect Codes (High Voltage Method) 15 Sector/Sector Block Protection and Unprotection .................. 16 Table 8. Top Boot Sector/Sector Block Addresses for Protection/Unprotection .............................................................16 Table 9. Bottom Boot Sector/Sector Block Addresses for Protection/Unprotection .............................................................16 Write Protect (WP#) ................................................................ 17 Temporary Sector/Sector Block Unprotect ............................. 17 Figure 1. Temporary Sector Unprotect Operation........................... 17 Figure 2. In-System Sector/Sector Block Protect and Unprotect Algorithms................................................................ 18 SecSi (Secured Silicon) Sector Flash Memory Region .......... 19 Hardware Data Protection ...................................................... 19 Low VCC Write Inhibit .....................................................................20 Write Pulse “Glitch” Protection ........................................................20 Logical Inhibit ..................................................................................20 Power-Up Write Inhibit ....................................................................20 Common Flash Memory Interface (CFI) . . . . . . . 20 Table 10. CFI Query Identification String ........................................ 20 System Interface String................................................................... 21 Table 12. Device Geometry Definition ............................................ 21 Table 13. Primary Vendor-Specific Extended Query ...................... 22 Command Definitions . . . . . . . . . . . . . . . . . . . . . . 23 Reading Array Data ................................................................ 23 Reset Command ..................................................................... 23 Autoselect Command Sequence ............................................ 23 Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 24 Byte/Word Program Command Sequence ............................. 24 Unlock Bypass Command Sequence ..............................................24 Figure 3. Program Operation .......................................................... 25 Chip Erase Command Sequence ........................................... 25 Sector Erase Command Sequence ........................................ 25 Erase Suspend/Erase Resume Commands ........................... 26 Figure 4. Erase Operation.............................................................. 26 Table 14. Am29DS163D Command Definitions.............................. 27 Write Operation Status . . . . . . . . . . . . . . . . . . . . 28 DQ7: Data# Polling ................................................................. 28 Figure 5. Data# Polling Algorithm .................................................. 28 RY/BY#: Ready/Busy# ............................................................ 29 DQ6: Toggle Bit I .................................................................... 29 Figure 6. Toggle Bit Algorithm........................................................ 29 DQ2: Toggle Bit II ................................................................... 30 Reading Toggle Bits DQ6/DQ2 ............................................... 30 DQ5: Exceeded Timing Limits ................................................ 30 DQ3: Sector Erase Timer ....................................................... 30 Table 15. Write Operation Status ................................................... 31 Absolute Maximum Ratings . . . . . . . . . . . . . . . . 32 Figure 7. Maximum Negative Overshoot Waveform ...................... 32 Figure 8. Maximum Positive Overshoot Waveform....................... 32 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 32 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 9. I CC1 Current vs. Time (Showing Active and Automatic Sleep Currents) ...................................................... 34 Figure 10. Typical I CC1 vs. Frequency ............................................ 34 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 11. Test Setup.................................................................... 35 Table 16. Test Specifications ......................................................... 35 Figure 12. Input Waveforms and Measurement Levels ................. 35 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 13. Read Operation Timings ............................................... 36 Figure 14. Reset Timings ............................................................... 37 Word/Byte Configuration (BYTE#) .......................................... 38 Figure 15. BYTE# Timings for Read Operations............................ 38 Figure 16. BYTE# Timings for Write Operations............................ 38 Erase and Program Operations .............................................. 39 Figure 17. Program Operation Timings.......................................... 40 Figure 18. Accelerated Program Timing Diagram .......................... 40 Figure 19. Chip/Sector Erase Operation Timings .......................... 41 Figure 20. Back-to-back Read/Write Cycle Timings ...................... 42 Figure 21. Data# Polling Timings (During Embedded Algorithms). 42 Figure 22. Toggle Bit Timings (During Embedded Algorithms)...... 43 Figure 23. DQ2 vs. DQ6................................................................. 43 Temporary Sector/Sector Block Unprotect ............................. 44 Figure 24. Temporary Sector/Sector Block Unprotect Timing Diagram ............................................................. 44 Figure 25. Sector/Sector Block Protect/Unprotect Timing Diagram 45 Alternate CE# Controlled Erase and Program Operations ..... 46 Figure 26. Alternate CE# Controlled Write (Erase/Program) Operation Timings .............................................. 47 Erase And Programming Performance . . . . . . . 48 Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 48 Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 49 FBA048—48-Ball Fine-Pitch Ball Grid Array (FBGA) 6 x 8 mm package ................................................................. 49 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 50 |
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