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MP1497S Arkusz danych(PDF) 12 Page - Monolithic Power Systems |
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MP1497S Arkusz danych(HTML) 12 Page - Monolithic Power Systems |
12 / 15 page MP1497S – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS MP1497S Rev. 1.01 www.MonolithicPower.com 12 9/7/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. voltage ripple low. The output voltage ripple can be estimated by: OUT OUT OUT ESR S1 IN S VV 1 V1 R fL V 8 f C2 Where L1 is the inductor value and RESR is the equivalent series resistance of the output capacitor. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency. The capacitance also causes the majority of the output voltage ripple. For simplification, estimate the output voltage ripple with: OUT OUT OUT 2 IN S1 VV ΔV1 V 8f L C2 For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: OUT OUT OUT ESR IN S1 VV ΔV1 R fL V The characteristics of the output capacitor also affect the stability of the regulation system. The MP1497S can be optimized for a wide range of capacitance and ESR values. External Bootstrap Diode An external bootstrap diode can enhance the efficiency of the regulator, given the following conditions: VOUT is 5V or 3.3V; and Duty cycle is high: D= IN OUT V V >65% In these cases, connect an external BST diode from the VCC pin to BST pin, as shown in Figure 5. SW BST MP1497S C L BST COUT External BST Diode VCC IN4148 Figure 5: Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST capacitor is 0.1µF to 1μF. PC Board Layout (9) PCB layout is very important to achieve stable operation especially for VCC capacitor and input capacitor placement. For best results, follow these guidelines: 1) Use large ground plane directly connect to GND pin. Add vias near the GND pin if bottom layer is ground plane. 2) Place the VCC capacitor to VCC pin and GND pin as close as possible. Make the trace length of VCC pin-VCC capacitor anode-VCC capacitor cathode-chip GND pin as short as possible. 3) Place the ceramic input capacitor close to IN and GND pins. Keep the connection of input capacitor and IN pin as short and wide as possible. 4) Route SW, BST away from sensitive analog areas such as FB. It’s not recommended to route SW, BST trace under chip’s bottom side. 5) Place the T-type feedback resistor R9 close to chip to ensure the trace which connects to FB pin as short as possible Notes: 9) The recommended layout is based on the Figure 6 Typical Application circuit on the next page. |
Podobny numer części - MP1497S |
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Podobny opis - MP1497S |
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