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S29GL01GP Arkusz danych(PDF) 52 Page - Cypress Semiconductor

Numer części S29GL01GP
Szczegółowy opis  1 Gbit, 512, 256, 128 Mbit, 3 V, Page Flash with 90 nm MirrorBit Process Technology
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Producent  CYPRESS [Cypress Semiconductor]
Strona internetowa  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

S29GL01GP Arkusz danych(HTML) 52 Page - Cypress Semiconductor

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Document Number: 002-00886 Rev. *B
Page 52 of 83
S29GL01GP
S29GL512P
S29GL256P
S29GL128P
11.7
AC Characteristics
11.7.1
S29GL-P Read Operations
Notes
1. CE#, OE# = VIL
2. OE# = VIL
3. Not 100% tested.
4. See Figure 11.3 and Table for test specifications.
5. Unless otherwise indicated, AC specifications for 110 ns speed options are tested with VIO = VCC = 2.7 V. AC specifications for 110 ns speed
options are tested with VIO = 1.8 V and VCC = 3.0 V.
S29GL-P Read Operations
Parameter
Description
(Notes)
Test Setup
Speed Options
JEDEC
Std.
90
100
110
120
130
Unit
tAVAV
tRC
Read Cycle Time
VIO = VCC = 2.7 V
Min
100
110
120
ns
VIO = 1.65 V to VCC,
VCC = 3 V
110
120 130
VIO = VCC = 3.0 V
90
100
110
tAVQV
tACC Address to Output Delay (1)
VIO = VCC = 2.7 V
Max
100
110
120
ns
VIO = 1.65 V to VCC,
VCC = 3 V
110
120 130
VIO = VCC = 3.0 V
90
100
110
tELQV
tCE
Chip Enable to Output Delay (2)
VIO = VCC = 2.7 V
Max
100
110
120
ns
VIO = 1.65 V to VCC,
VCC = 3 V
110
120 130
VIO = VCC = 3.0 V
90
100
110
tPACC Page Access Time
Max
25
ns
tGLQV
tOE
Output Enable to Output Delay
Max
25
ns
tEHQZ
tDF
Chip Enable to Output High Z (3)
Max
20
ns
tGHQZ
tDF
Output Enable to Output High Z (3)
Max
20
ns
tAXQX
tOH
Output Hold Time From Addresses, CE#
or OE#, Whichever Occurs First
Min
0
ns
tOEH
Output Enable Hold Time
(3)
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
tCEH Chip Enable Hold Time
Read
Min
35
ns


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