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BTS50025-1TAD Arkusz danych(PDF) 15 Page - Infineon Technologies AG |
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BTS50025-1TAD Arkusz danych(HTML) 15 Page - Infineon Technologies AG |
15 / 51 page Data Sheet 15 Rev. 1.1 2017-03-30 BTS50025-1TAD Smart High-Side Power Switch General Product Characteristics 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Figure 7 is showing the typical thermal impedance of BTS50025-1TAD mounted according to JEDEC JESD51- 2,-5,-7 at natural convection on FR4 1s0p and 2s2p boards. Figure 7 Typical Transient Thermal Impedance Zth(JA) = f(time) for Different PCB Conditions Table 4 Thermal Resistance Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Junction to Case RthJC –– 0.8 K/W 1) 1) Not subject to production test, specified by design. P_4.3.1 Junction to Ambient RthJA(2s2p) –20 – K/W 1)2) 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2×114.3×1.5 mm board with 2 inner copper layers (2×70µm Cu, 2×35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. TA = 25°C. Device is dissipating 2 W power. P_4.3.2 Junction to Ambient RthJA –70 – K/W 1)3) 3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 1s0p board; the Product (Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm board with only one top copper layer 1 × 70 µm. TA =25°C. Device is dissipating 2 W power. P_4.3.3 0.01 0.1 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000 tPULSE [s] JEDEC 1s0p / 600mm² JEDEC 1s0p / 300mm² JEDEC 1s0p / footprint JEDEC 2s2p |
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