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VNH3ASP30TR-E Arkusz danych(PDF) 8 Page - STMicroelectronics |
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VNH3ASP30TR-E Arkusz danych(HTML) 8 Page - STMicroelectronics |
8 / 18 page VNH3ASP30-E 8/18 Figure 5. Typical Application Circuit For Dc To 20KHz PWM Operation In case of a fault condition the DIAGX/ENX pin is consid- ered as an output pin by the device. The fault conditions are: - overtemperature on one or both high sides (for example if a short to ground occurs as it could be the case described in line 1 and 2 in the table below); - short to battery condition on the output (saturation detection on the Low-Side Power MOSFET). Possible origins of fault conditions may be: OUTA is shorted to ground ---> overtemperature detection on high side A. OUTA is shorted to VCC ---> Low-Side Power MOSFET saturation detection. When a fault condition is detected, the user can know which power element is in fault by monitoring the INA, INB, DIAGA/ENA and DIAGB/ENB pins. In any case, when a fault is detected, the faulty leg of the bridge is latched off. To turn-on the respective output (OUTX) again, the input signal must rise from low to high level. Table 15. Truth Table In Fault Conditions (detected on OUTA) M µC Reg 5V + 5V HSA HSB LSA LSB VCC DIAGA/ENA CS INA PWM OUTA OUTB D S G b) N MOSFET 3.3K 1K 1K 1K 10K 33nF 1.5K VCC 100K INA INB DIAGA/ENA DIAGB/ENB OUTA OUTB CS 1 1 0 1 OPEN H High Imp. 1 0 0 1 OPEN L High Imp. 0 1 0 1 OPEN H IOUTB/K 0 0 0 1 OPEN L High Imp. X X 0 0 OPEN OPEN High Imp. X 1 0 1 OPEN H IOUTB/K X 0 0 1 OPEN L High Imp. Fault Information Protection Action |
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