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GD5F2GQ4RFZIS Arkusz danych(PDF) 28 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD5F2GQ4RFZIS Arkusz danych(HTML) 28 Page - GigaDevice Semiconductor (Beijing) Inc. |
28 / 57 page SPI(x1/x2/x4) NAND Flash 2G 28 108-109 M Block endurance for guaranteed valid blocks 01H 05H 110 M Number of programs per page 04H 111 M Partial programming attributes 5-7 Reserved 4 1 = partial page layout is partial page data followed by partial page spare 1-3 Reserved 0 1 = partial page programming has constraints 00H 112 M Number of bits ECC correctability 08H 113 M Number of interleaved address bits 4-7 Reserved (0) 0-3 Number of interleaved address bits 00H 114 O Interleaved operation attributes 4-7 Reserved (0) 3 Address restrictions for program cache 2 1 = program cache supported 1 1 = no block address restrictions 0 Overlapped / concurrent interleaving support 00H 115-127 Reserved 00H … 00H Electrical parameters block 128 M I/O capacitance 06H 129-130 M IO clock support 3-1 5 Reserved (0) 2 1 = supports 80MHz 1 1 = supports 104MHz 0 1 = supports 120MHz 01H 00H 131-132 O Reserved (0) 00H 00H 133-134 M tPROG Maximum page program time (us) BCH 02H 135-136 M tBERS Maximum block erase time (us) 88H 13H 137-138 M tR Maximum page read time (us) 50H 00H 139-140 M Reserved 00H 00H 141-163 Reserved 00H Vendor block 164-165 M Vendor specific Revision number 00H 166-253 Vendor specific 00H 254-255 M Integrity CRC Set on test |
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