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GD25B257D Datasheet(Arkusz danych) 4 Page - GigaDevice Semiconductor (Beijing) Inc.

Numer części GD25B257D
Szczegółowy opis  3.3V Uniform Sector Dual and Quad Serial Flash
Pobierz  92 Pages
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Producent  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Strona internetowa  http://www.gigadevice.com/
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 4 page
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3.3V Uniform Sector
Dual and Quad Serial Flash
GD25B257D
4
1. FEATURES
256M-bit Serial Flash
Fast Program/Erase Speed
- 32M-Byte
- Page Program time: 0.6ms typical
- 256-Byte per programmable page
- Sector Erase time: 70ms typical
- Block Erase time: 0.2/0.3s typical
Standard, Dual, Quad SPI, DTR
- Chip Erase time: 100s typical
- Standard SPI: SCLK, CS#, SI, SO, RESET#
- Dual SPI: SCLK, CS#, IO0, IO1, RESET#
Flexible Architecture
- Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3
- Uniform Sector of 4K-Byte
- SPI DTR (Double Transfer Rate) Read
- Uniform Block of 32/64K-Byte
- On-chip ECC (1-bit correction every 8-Byte) (1)
- 3 or 4-Byte Addressing Mode
Low Power Consumption
-1uA typical deep power down current
High Speed Clock Frequency
-12uA typical standby current
-Maximum 104MHz for fast read on 3.0 - 3.6V power supply
Dual I/O Data transfer up to 208Mbits/s
Advanced Security Features
Quad I/O Data transfer up to 416Mbits/s
- 3x2048-Byte Security Registers With OTP Locks
DTR Quad I/O Data transfer up to 640Mbits/s
- 128-bit Unique ID
-Maximum 80MHz for fast read on 2.7 - 3.0V power supply
- Serial Flash Discoverable parameters (SFDP) register
Dual I/O Data transfer up to 160Mbits/s
Quad I/O Data transfer up to 320Mbits/s
Single Power Supply Voltage
DTR Quad I/O Data transfer up to 560Mbits/s
- Full voltage range: 2.7 - 3.6V
Software Write Protection
Endurance and Data Retention
-Write protect all/portion of memory via software
- 20-year data retention typical
-Top/Bottom Block protection
- Minimum 100,000 Program/Erase Cycles
Allows XIP (eXecute In Place) Operation
Package Information
- Continuous Read With 8/16/32/64-Byte Wrap
- SOP16 (300mil)
- WSON8 (8x6mm)
- TFBGA-24 (5x5 ball array)
Note:
1. When ECC is enabled, it is required to program minimum one or multiple aligned 8-Byte granularities. Every aligned 8-
Byte granularity should only be programmed once before Erase to ensure correct ECC operations.




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