Zakładka z wyszukiwarką danych komponentów
Selected language     Polish  ▼
Nazwa części
         Szczegóły


GD25LB32D Datasheet(Arkusz danych) 28 Page - GigaDevice Semiconductor (Beijing) Inc.

Numer części GD25LB32D
Szczegółowy opis  1.8V Uniform Sector Dual and Quad Serial Flash
Pobierz  67 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Producent  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Strona internetowa  http://www.gigadevice.com/
Logo 

 28 page
background image
1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LB32D
28
7.13.
Quad I/O Word Fast Read (E7H)
The Quad I/O Word Fast Read command is similar to the Quad I/O Fast Read command except that the lowest
address bit (A0) must be equal 0 and there are only 2-dummy clocks. The command sequence is shown in followed
Figure13. The first byte addressed can be at any location. The address is automatically incremented to the next higher
address after each byte of data is shifted out.
Quad I/O Word Fast Read with
“Continuous Read Mode”
The Quad I/O Word Fast Read command can further reduce command overhead through setting the
“Continuous
Read Mode
” bits (M7-0) after the input 3-byte address (A23-A0). If the “Continuous Read Mode” bits (M5-4) = (1, 0), then
the next Quad I/O Word Fast Read command (after CS# is raised and then lowered) does not require the E7H command
code. The command sequence is shown in followed Figure13a. If the
“Continuous Read Mode” bits (M5-4) do not equal to
(1, 0), the next command requires the first E7H command code, thus returning to normal operation. A
“Continuous Read
Mode
” Reset command can be used to reset (M5-4) before issuing normal command.
Figure13. Quad I/O Word Fast Read Sequence Diagram (M5-4
≠ (1, 0))
Command
0
1
2
3
4
5
6
7
E7H
CS#
SCLK
SI(IO0)
SO(IO1)
8
9 10 11 12 13 14 15
4
0
4
0
4
0
4
0
16 17 18 19 20 21 22 23
4
0
4
0
5
1
5
1
5
1
5
1
5
1
5
1
A23-16 A15-8 A7-0
M7-0
6
2
6
2
6
2
6
2
6
2
6
2
7
3
7
3
7
3
7
3
7
3
7
3
IO2
IO3
4
5
6
7
Dummy
Byte1 Byte2
4
0
5
1
6
2
7
3
Byte3
Figure13a. Quad I/O Word Fast Read Sequence Diagram (M5-4= (1, 0))
0
1
2
3
4
5
6
7
CS#
SCLK
8
9 10 11 12 13 14 15
SI(IO0)
SO(IO1)
IO2
IO3
4
0
4
0
5
1
5
1
6
2
6
2
7
3
7
3
4
0
4
0
5
1
5
1
6
2
6
2
7
3
7
3
4
0
4
0
5
1
5
1
6
2
6
2
7
3
7
3
4
5
6
7
A23-16 A15-8 A7-0
M7-0 Dummy Byte1 Byte2
4
0
5
1
6
2
7
3
Byte3




Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67 


Datasheet Download




Link URL

Czy Alldatasheet okazała się pomocna?  [ DONATE ]  

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Dodaj do ulubionych   |   Linki   |   Lista producentów
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  , Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp  |   Russian : Alldatasheetru.com
Korean : Alldatasheet.co.kr   |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com  |   Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl