MC10E195 MC100E195

MOTOROLA

ECLinPS and ECLinPS Lite

DL140 — Rev 4

2–2

DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

0

°C

25

°C

85

°C

Symbol

Characteristic

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

Condition

IIH

Input HIGH Current

150

150

150

µA

IEE

Power Supply Current

10E

100E

130

130

156

156

130

130

156

156

130

150

156

179

mA

AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

0

°C

25

°C

85

°C

Symbol

Characteristic

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

Notes

tPLH

tPHL

Propagation Delay

IN to Q; Tap = 0

IN to Q; Tap = 127

EN to Q; Tap = 0

D7 to CASCADE

1210

3200

1250

300

1360

3570

1450

450

1510

3970

1650

700

1240

3270

1275

300

1390

3630

1475

450

1540

4030

1675

700

1440

3885

1350

300

1590

4270

1650

450

1765

4710

1950

700

ps

tRANGE

Programmable Range

tPD (max) – tPD (min)

2000

2175

2050

2240

2375

2580

ps

∆t

Step Delay

D0 High

D1 High

D2 High

D3 High

D4 High

D5 High

D6 High

55

115

250

505

1000

17

34

68

136

272

544

1088

105

180

325

620

1190

55

115

250

515

1030

17.5

35

70

140

280

560

1120

105

180

325

620

1220

65

140

305

620

1240

21

42

84

168

336

672

1344

120

205

380

740

1450

ps

6

Lin

Linearity

D1

D0

D1

D0

D1

D0

7

tSKEW

Duty Cycle Skew

tPHL–tPLH

±30

±30

±30

ps

1

ts

Setup Time

D to LEN

D to IN

EN to IN

200

800

200

0

200

800

200

0

200

800

200

0

ps

2

3

th

Hold Time

LEN to D

IN to EN

500

0

250

500

0

250

500

0

250

ps

4

tR

Release Time

EN to IN

SET MAX to LEN

SET MIN to LEN

300

800

800

300

800

800

300

800

800

ps

5

tjit

Jitter

<5.0

<5.0

<5.0

ps

8

tr

tf

Output Rise/Fall Time

20–80% (Q)

20–80% (CASCADE)

125

300

225

450

325

650

125

300

225

450

325

650

125

300

225

450

325

650

ps

1. Duty cycle skew guaranteed only for differential operation measured from the cross point of the input to the cross point of the output.

2. This setup time defines the amount of time prior to the input signal the delay tap of the device must be set.

3. This setup time is the minimum time that EN must be asserted prior to the next transition of IN/IN to prevent an output response greater than

±75 mV to that IN/IN transition.

4. This hold time is the minimum time that EN must remain asserted after a negative going IN or positive going IN to prevent an output response

greater than

±75 mV to that IN/IN transition.

5. This release time is the minimum time that EN must be deasserted prior to the next IN/IN transition to ensure an output response that meets

the specified IN to Q propagation delay and transition times.

6. Specification limits represent the amount of delay added with the assertion of each individual delay control pin. The various combinations of

asserted delay control inputs will typically realize D0 resolution steps across the specified programmable range.

7. The linearity specification guarantees to which delay control input the programmable steps will be monotonic (i.e. increasing delay steps for

increasing binary counts on the control inputs Dn). Typically the device will be monotonic to the D0 input, however under worst case conditions

and process variation, delays could decrease slightly with increasing binary counts when the D0 input is the LSB. With the D1 input as the LSB

the device is guaranteed to be monotonic over all specified environmental conditions and process variation.

8. The jitter of the device is less than what can be measured without resorting to very tedious and specialized measurement techniques.