MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

2–213

REV 6

9/96

Quad Exclusive OR Gate

The MC10H113 is a Quad Exclusive OR Gate with an enable common to all

four gates. The outputs may be wire–ORed together to perform a 4–bit

comparison function (A = B). The enable is active LOW.

• Propagation Delay, 1.3 ns Typical

• Power Dissipation 175 mW Typ/Pkg (No Load)

• Improved Noise Margin 150 mV (Over Operating Voltage and

Temperature Range)

• Voltage Compensated

• MECL 10K–Compatible

MAXIMUM RATINGS

Characteristic

Symbol

Rating

Unit

Power Supply (VCC = 0)

VEE

–8.0 to 0

Vdc

Input Voltage (VCC = 0)

VI

0 to VEE

Vdc

Output Current — Continuous

— Surge

Iout

50

100

mA

Operating Temperature Range

TA

0 to +75

°C

Storage Temperature Range — Plastic

— Ceramic

Tstg

–55 to +150

–55 to +165

°C

°C

ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)

0

°

25

°

75

°

Characteristic

Symbol

Min

Max

Min

Max

Min

Max

Unit

Power Supply Current

IE

—

46

—

42

—

46

mA

Input Current High

Pins 5, 7, 11, 13

Pins 4, 6, 10, 12

Pin 9

IinH

—

—

—

430

510

1100

—

—

—

270

320

740

—

—

—

270

320

740

µA

Input Current Low

IinL

0.5

—

0.5

—

0.3

—

µA

High Output Voltage

VOH

–1.02

–0.84

–0.98

–0.81

–0.92

–0.735

Vdc

Low Output Voltage

VOL

–1.95

–1.63

–1.95

–1.63

–1.95

–1.60

Vdc

High Input Voltage

VIH

–1.17

–0.84

–1.13

–0.81

–1.07

–0.735

Vdc

Low Input Voltage

VIL

–1.95

–1.48

–1.95

–1.48

–1.95

–1.45

Vdc

AC PARAMETERS

Propagation Delay

Data

Enable

tpd

0.4

0.5

1.7

2.3

0.4

0.5

1.8

2.4

0.5

0.6

1.9

2.5

ns

Rise Time

tr

0.5

1.8

0.6

1.9

0.6

2.0

ns

Fall Time

tf

0.5

1.8

0.6

1.9

0.6

2.0

ns

NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,

after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed

circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated

through a 50–ohm resistor to –2.0 volts.

L

L

H

E

L

L

L

H

L

X

H

X

OUTPUT

MC10H113

LOGIC DIAGRAM

DIP

PIN ASSIGNMENT

VCC1

AOUT

BOUT

AIN

AIN

BIN

BIN

VEE

VCC2

DOUT

COUT

DIN

DIN

CIN

CIN

ENABLE

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

E

9

TRUTH TABLE

IN

LL

13

12

15

VCC1 = PIN 1

VCC2 = PIN 16

VEE = PIN 8

11

10

14

7

6

3

5

4

2

LH

HH

HL

L

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

FN SUFFIX

PLCC

CASE 775–02

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6–11 of the Motorola MECL Data

Book (DL122/D).