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Zakładka z wyszukiwarką danych komponentów |
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X1243S8 Arkusz danych(PDF) 2 Page - Intersil Corporation |
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X1243S8 Arkusz danych(HTML) 2 Page - Intersil Corporation |
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2 / 17 page  2 FN8249.0 April 28, 2005 Pin Configuration Pin Descriptions Serial Clock (SCL) The SCL input is used to clock all data into and out of the device. The input buffer on this pin is always active (not gated). Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs.The input buffer is always active (not gated). An open drain output requires the use of a pull-up resistor. The output circuitry controls the fall time of the output signal with the use of a slope controlled pull-down. The circuit is designed for 400kHz 2-wire inter-face speeds. VBACK This input provides a backup supply voltage to the device. V BACK supplies power to the device in the event the V CC supply fails. Interrupt Output—IRQ This is an interrupt signal output. This signal noties a host processor that alarm has occurred and requests action. It is an open drain active LOW output. X1, X2 The X1 and X2 pins are the input and output, respectively, of an inverting amplier that can be con-gured for use as an on- chip oscillator. A 32.768kHz quartz crystal is used. Recommended crystal is a Citizen CFS-206. The crystal supplies a timebase for a clock/ oscillator. The internal clock can be driven by an external signal on X1, with X2 left unconnected. Power Control Operation The Power control circuit accepts a V CC and a VBACK input. The power control circuit will switch to V BACK when VCC < V BACK – 0.2V. It will switch back to VCC when VCC exceeds V BACK. Real Time Clock Operation The Real Time Clock (RTC) uses an external, 32.768kHz quartz crystal to maintain an accurate internal repre- sentation of the year, month, day, date, hour, minute, and seconds. The RTC has leap-year correction and a century byte. The clock will also correct for months hav-ing fewer than 31 days and will have a bit that controls 24-hour or AM/PM format. When the X1243 powers up after the loss of both V CC and VBACK, the clock will not increment until at least one byte is written to the clock register. Reading the Real Time Clock The RTC is read by initiating a Read command and specifying the address corresponding to the register of the Real Time Clock. The RTC Registers can then be read in a Sequential Read Mode. Since the clock runs continuously and a read takes a nite amount of time, there is the possibility that the clock could change dur-ing the course of a read operation. In this device, the time is latched by the read command (falling edge of the clock on the ACK bit prior to RTC data output) into a separate latch to avoid time changes during the read operation. The clock continues to run. Alarms occurring during a read are unaffected by the read operation. X1243 X1 X2 VBack VCC IRQ SCL SDA VSS 1 2 3 4 7 8 6 5 8-Pin TSSOP X1243 X1 X2 VBack VCC IRQ SCL SDA VSS 1 2 3 4 7 8 6 5 8-Pin SOIC X1 X2 68pF 12pF 360K 10M FIGURE 1. RECOMMENDED CRYSTAL CONNECTION VBACK VCC = VBACK -0.2V Internal Voltage VCC FIGURE 2. POWER CONTROL X1243 |
Podobny numer części - X1243S8 |
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Podobny opis - X1243S8 |
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