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HV633 Arkusz danych(PDF) 5 Page - Supertex, Inc |
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HV633 Arkusz danych(HTML) 5 Page - Supertex, Inc |
5 / 10 page HV633 Functional Block Diagram Output Stage Latches and Comparators Latches and Comparators Latches and Comparators Latches and Comparators Load Count CC Clear Dual 16-bit Shift Registers VR GND VPP HVOUT1 Output Stage HVOUT2 Data In Buffers HVOUT31 VCTL RCTL Output Stage Counter Reset Counter HVOUT32 Data Latches Data Latches Data Latches Data Latches RS F/F RS F/F RS F/F RS F/F 7 7 7 7 7 7 7 7 7 L/E L/E L/E L/E Clear Pulse Generator Load Count Buffer Count Clock Buffer SC SC SC Shift Clock Buffer CSI I/O Buffers CC LC D1 D7 DIR CSO I/O Buffers See Output Stage Detail Output Stage 1 2 31 32 SC = Shift Clock LC = Load Count CC = Count Clock CSI = Chip Select Input CSO = Chip Select Output *Strobe = twice the SC frequency Logic 70V HV633 0V Output Stage VR HVGND LVGND VPP = 80V + – HVOUT 1K Ω Vtst 10K Ω + - 1. Set HV OUT = Low. 2. Apply V PP = 80V. 3. Apply a step voltage of 70V at V R (slew rate = 4.1V/µs). 4. Measure voltage across the 1K Ω resistor. 5. Output source current can be calculated by using V tst . 1K Internal Logic & Bias Circuit VCTL RCTL VR VPP CH Q1 Q2 HVOUT Test Circuit High-voltage Analog Output Source Current (I AOH) For gray shade #1 (000 0000) Output Stage Detail |
Podobny numer części - HV633 |
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Podobny opis - HV633 |
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