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TA2024B Arkusz danych(PDF) 4 Page - Tripath Technology Inc.

Numer części TA2024B
Szczegółowy opis  STEREO 15W (4?? CLASS-T??DIGITAL AUDIO AMPLIFIER USING DIGITAL POWER PROCESSING??TECHNOLOGY
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Producent  TRIPATH [Tripath Technology Inc.]
Strona internetowa  http://www.etelos.com/
Logo TRIPATH - Tripath Technology Inc.

TA2024B Arkusz danych(HTML) 4 Page - Tripath Technology Inc.

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Tri p ath Techn o l o g y, I n c. - T echn i cal I n fo rmation
4
TA2024B –KL/1.2/01.06
P I N DE SCRI PTI ON
TA20 24B PINO UT
FAULT
PGND2
NC
NC
VDD2
OUTM2
OUTM1
VDD1
NC
VDDA
NC
PGND1
CPUMP
DCAP2
AGND3
BIASCAP
INV2
OAOUT2
MUTE
INV1
OAOUT1
V5A
AGND2
OVERLOADB
REF
AGND1
V5D
DCAP1
30
19
20
21
22
23
24
25
26
27
28
29
1
15
14
13
11
10
12
9
8
7
6
5
4
3
2
36-pin Power SOP Package
(Top View)
16
17
18
+5VGEN
36
31
32
33
34
35
OUTP1
VDD1
VDD2
OUTP2
DGND
NC
SLEEP
Pin
Function
Description
2, 3
DCAP2, DCAP1
Charge pump switching pins. DCAP1 (pin 3) is a free running 300kHz square
wave between VDDA and DGND (12Vpp nominal). DCAP2 (pin 2) is level shifted
10 volts above DCAP1 (pin 3) with the same amplitude (12Vpp nominal),
frequency, and phase as DCAP1.
4, 9
V5D, V5A
Digital 5VDC, Analog 5VDC
5, 8,
17
AGND1, AGND2,
AGND3
Analog Ground
6
REF
Internal reference voltage; approximately 1.0 VDC.
7
OVERLOADB
A logic low output indicates the input signal has overloaded the amplifier.
10, 14
OAOUT1, OAOUT2
Input stage output pins.
11, 15
INV1, INV2
Single-ended inputs. Inputs are a “virtual” ground of an inverting opamp with
approximately 2.4VDC bias.
12
MUTE
When set to logic high, both amplifiers are muted and in idle mode. When low
(grounded), both amplifiers are fully operational. If left floating, the device stays in
the mute mode. This pin should be tied to GND if not used.
16
BIASCAP
Input stage bias voltage (approximately 2.4VDC).
18
SLEEP
When set to logic high, device goes into low power mode. If not used, this pin
should be grounded
19
FAULT
A logic high output indicates thermal overload, or an output is shorted to ground,
or another output.
20, 35
PGND2, PGND1
Power Grounds (high current)
22
DGND
Digital Ground. Connect to AGND locally (near the TA2024B).
24, 27;
31, 28
OUTP2 & OUTM2;
OUTP1 & OUTM1
Bridged output pairs
25, 26,
29, 30
VDD2, VDD2
VDD1, VDD1
Supply pins for high current H-bridges, nominally 12VDC.
13, 21,
23, 32,
34
NC
Not connected. Not bonded internally.
33
VDDA
Analog 12VDC
36
CPUMP
Charge pump output (nominally 10V above VDDA)
1
5VGEN
Regulated 5VDC source used to supply power to the input section (pins 4 and 9).


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