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ADM1068 Arkusz danych(PDF) 10 Page - Analog Devices

Numer części ADM1068
Szczegółowy opis  Super Sequencer??and Monitor
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ADM1068 Arkusz danych(HTML) 10 Page - Analog Devices

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ADM1068
Preliminary Technical Data
Rev. PrB | Page 10 of 28
POWERING THE ADM1068
The ADM1068 is powered from the highest voltage input on
either the positive-only supply inputs (VPn) or the high voltage
supply input (VH). This technique offers improved redundancy
as the device is not dependent on any particular voltage rail to
keep it operational. The same pins are used for supply fault
detection (discussed later in the next section). A VDD arbitrator
on the device chooses which supply to use. The arbitrator can
be considered an OR’ing of four LDOs together. A supply
comparator chooses which of the inputs is highest and selects
this one to provide the on-chip supply. There is minimal
switching loss with this architecture (~0.2 V), resulting in the
ability to power the ADM1068 from a supply as low as 3.0 V.
Note that the supply on the VXn pins cannot be used to power
the device.
An external capacitor to GND is required to decouple the on-
chip supply from noise. This capacitor should be connected to
the VDDCAP pin, as shown in Figure 14. The capacitor has
another use during brownouts (momentary loss of power).
Under these conditions, when the input supply (VPn or VH)
dips transiently below VDD, the synchronous rectifier switch
immediately turns off so that it does not pull VDD down. The
VDD cap can then act as a reservoir to keep the device active
until the next highest supply takes over the powering of the
device. 10 µF is recommended for this reservoir/decoupling
function.
Note that when two or more supplies are within 100 mV of each
other, the supply that takes control of VDD first keeps control.
For example, if VP1 is connected to a 3.3 V supply, then VDD
powers up to approximately 3.1 V through VP1. If VP2 is then
connected to another 3.3 V supply, VP1 still powers the device,
unless VP2 goes 100 mV higher than VP1.
SUPPLY
COMPARATOR
IN
EN
OUT
4.75V
LDO
IN
EN
OUT
4.75V
LDO
IN
EN
OUT
4.75V
LDO
IN
EN
OUT
4.75V
LDO
VH
VP3
VP2
VP1
VDDCAP
INTERNAL
DEVICE
SUPPLY
Figure 14. VDD Arbitrator Operation


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