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74LV107 Arkusz danych(PDF) 6 Page - NXP Semiconductors

Numer części 74LV107
Szczegółowy opis  Dual JK flip-flop with reset; negative-edge trigger
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Producent  PHILIPS [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LV107 Arkusz danych(HTML) 6 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LV107
Dual JK flip-flop with reset; negative-edge trigger
1998 Apr 20
6
AC CHARACTERISTICS (Continued)
GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ
SYMBOL
PARAMETER
WAVEFORM
CONDITION
–40 to +85
°C
–40 to +125
°C
UNIT
SYMBOL
PARAMETER
WAVEFORM
VCC(V)
MIN
TYP1
MAX
MIN
MAX
UNIT
1.2
95
Propagation delay
2.0
32
44
56
tPHL/tPLH
Propagation delay
nR to nQ, nQ
Figures 1, 2
2.7
24
33
41
ns
nR to nQ, nQ
3.0 to 3.6
182
26
33
4.5 to 5.5
22
28
2.0
34
14
41
tW
Clock pulse width
Figure 2
2.7
25
10
30
ns
tW
HIGH or LOW
Figure 2
3.0 to 3.6
20
82
24
ns
4.5 to 5.5
15
18
2.0
34
14
41
tW
Reset pulse width
Figure 2
2.7
25
10
30
ns
tW
LOW
Figure 2
3.0 to 3.6
20
82
24
ns
4.5 to 5.5
15
1.2
35
Removal time
2.0
24
12
29
trem
Removal time
nR to nCP
Figure 2
2.7
18
9
21
ns
nR to nCP
3.0 to 3.6
14
72
17
4.5 to 5.5
11
14
1.2
40
Set up time
2.0
26
14
31
tsu
Set-up time
nJ, nK to CP
Figure 1
2.7
19
10
23
ns
nJ, nK to CP
3.0 to 3.6
15
82
18
4.5 to 5.5
12
15
1.2
-10
Hold time
2.0
5
–3
5
th
Hold time
nJ, nK to CP
Figure 1
2.7
5
–2
5
ns
nJ, nK to CP
3.0 to 3.6
5
–22
5
4.5 to 5.5
5
5
2.0
14
40
12
f
Maximum clock
Figure 1
2.7
19
58
16
MHz
fmax
pulse frequency
Figure 1
3.0 to 3.6
24
702
20
MHz
4.5 to 5.5
30
24
NOTES:
1. Unless otherwise stated, all typical values are measured at Tamb = 25°C
2. Typical values are measured at VCC = 3.3 V.


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