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74LV132DB Arkusz danych(PDF) 3 Page - NXP Semiconductors |
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74LV132DB Arkusz danych(HTML) 3 Page - NXP Semiconductors |
3 / 12 page Philips Semiconductors Product specification 74LV132 Quad 2-input NAND Schmitt-trigger 1998 Apr 28 3 PIN CONFIGURATION 14 13 12 11 10 9 7 6 5 4 3 2 1 GND 1A 1B 1Y 2A 2B 2Y VCC 4B 4A 4Y 3B 3A SV00213 8 3Y LOGIC SYMBOL (IEEE/IEC) 3 & & & & 6 8 11 1 2 4 5 9 10 12 13 SV00216 LOGIC SYMBOL 3 1 2 SV00215 1A 1B 4 5 2A 2B 9 10 3A 3B 12 13 4A 4B 1Y 2Y 6 3Y 8 4Y 11 LOGIC DIAGRAM Y A B SV00217 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT VCC DC supply voltage See Note1 1.0 3.3 5.5 V VI Input voltage 0 – VCC V VO Output voltage 0 – VCC V Tamb Operating ambient temperature range in free air See DC and AC characteristics –40 –40 +85 +125 °C tr, tf Input rise and fall times except for Schmitt-trigger inputs VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V – – – – – – – – 500 200 100 50 ns/V NOTE: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V. |
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