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74LV20N Arkusz danych(PDF) 2 Page - NXP Semiconductors

Numer części 74LV20N
Szczegółowy opis  Dual 4-input NAND gate
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Producent  PHILIPS [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LV20N Arkusz danych(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LV20
Dual 4-input NAND gate
2
1998 Apr 20
853–1962 19256
FEATURES
Optimized for Low Voltage applications: 1.0 to 3.6V
Accepts TTL input levels between V
CC = 2.7V and VCC = 3.6V
Typical V
OLP (output ground bounce) t 0.8V @ VCC = 3.3V,
Tamb = 25°C
Typical V
OHV (output VOH undershoot) u 2V @ VCC = 3.3V,
Tamb = 25°C
Output capability: standard
I
CC category: SSI
DESCRIPTION
The 74LV20 is a low–voltage Si–gate CMOS device and is pin and
function compatible with 74HC/HCT20.
The 74LV20 provides the 4–input NAND function.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr =tf v2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
Propagation delay
nA, nB, nC, nD to nY
CL = 15pF
VCC = 3.3V
8
ns
CI
Input capacitance
3.5
pF
CPD
Power dissipation capacitance per gate
Notes 1 and 2
22
pF
NOTES:
1CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD
VCC2 x fi )S (CL
VCC2
fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL
VCC2
fo) = sum of the outputs.
2
The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic DIL
–40
°C to +125°C
74LV20 N
74LV20 N
SOT27-1
14-Pin Plastic SO
–40
°C to +125°C
74LV20 D
74LV20 D
SOT108-1
14-Pin Plastic SSOP Type II
–40
°C to +125°C
74LV20 DB
74LV20 DB
SOT337-1
14-Pin Plastic TSSOP Type I
–40
°C to +125°C
74LV20 PW
74LV20PW DH
SOT402-1
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1, 9
1A to 2A
Data inputs
2, 10
1B to 2B
Data inputs
3, 11
NC
No connection
4, 12
1C to 2C
Data inputs
5, 13
1D to 2D
Data inputs
6, 8
1Y to 2Y
Data outputs
7
GND
Ground (0V)
14
VCC
Positive supply voltage
FUNCTION TABLE
INPUTS
OUTPUTS
nA
nB
nC
nD
nY
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
H
H
H
H
L
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = Don’t care


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