Zakładka z wyszukiwarką danych komponentów |
|
ST72334J Arkusz danych(PDF) 41 Page - STMicroelectronics |
|
ST72334J Arkusz danych(HTML) 41 Page - STMicroelectronics |
41 / 125 page ST72334J/N, ST72314J/N, ST72124J 41/125 POWER SAVING MODES (Cont’d) 5.2.4 SLOW Mode This mode has two targets: – To reduce power consumption by decreasing the internal clock in the device, – To adapt the internal clock frequency (fCPU)to the available supply voltage. SLOW mode is controlled by three bits in the MISCR1 register: the SMS bit which enables or disables Slow mode and two CPx bits which select the internal slow frequency (fCPU). In this mode, the oscillator frequency can be divid- ed by 4, 8, 16 or 32 instead of 2 in normal operat- ing mode. The CPU and peripherals are clocked at this lower frequency. Note: SLOW-WAIT mode is activated when enter- ring the WAIT mode while the device is already in SLOW mode. Figure 31. SLOW Mode: timing diagram for internal CPU clock transitions 00 01 0 1 SMS CP1:0 fCPU fOSC/8 fOSC/4 NEW FREQUENCY REQUEST NEW FREQUENCY ACTIV E WHEN OSC/4 & OSC/8 = 0 NORMAL MODE REQUEST NORMAL MODE ACTIVE (OSC/4, OSC/8 STOPPED ) MISCR1 REGISTE R |
Podobny numer części - ST72334J |
|
Podobny opis - ST72334J |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |