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74LV4094N Arkusz danych(PDF) 9 Page - NXP Semiconductors

Numer części 74LV4094N
Szczegółowy opis  8-stage shift-and-store bus register
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Producent  PHILIPS [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LV4094N Arkusz danych(HTML) 9 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LV4094
8-stage shift-and-store bus register
1998 Jun 23
9
AC CHARACTERISTICS (Continued)
GND = 0 V; tr = tf ≤ 2.5ns; CL = 50pF
CONDITION
–40 to +85
°C
–40 to +125
°C
SYMBOL
PARAMETER
WAVEFORM
VCC
(V)
MIN
TYP1
MAX
MIN
MAX
UNIT
1.2
–25
Th
Hold time
2.0
5
–9
5
ns
Th
D to STR
2.7
5
–6
5
ns
3.0 to 3.6
5
–52
5
Maximum clock pulse
2.0
14
52
12
fmax
Maximum clock pulse
frequency
2.7
19
70
16
MHz
frequency
3.0 to 3.6
24
872
20
NOTES:
1.
Unless otherwise stated, all typical values are measured at Tamb = 25°C
2.
Typical values are measured at VCC = 3.3 V.
AC WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V
VM = 0.5 × VCC at VCC < 2.7 V.
VOL and VOH are the typical output voltage drop that occur with the output load.
VX = VOL + 0.3 V at VCC ≥ 2.7 V
VX = VOL + 0.1 × VCC at VCC < 2.7 ς
VY = VOH ± 0.3 V at VCC ≥ 2.7 V
VY = VOH ± 0.1 × VCC at VCC < 2.7V
SV01620
VM
CP INPUT
QPn, QS1 OUTPUT
QS2 OUTPUT
VM
VM
tPHL
tPHL
tPLH
tPLH
tW
1/fmax
VCC
GND
VOL
VOL
VOH
VOH
Figure 1. Clock (CP) to output (QPn, QS1, QS2)
propagation delays, the clock pulse width
and the maximum clock frequency.
SV01619
VM
CP INPUT
STR INPUT
QPn OUTPUT
VM
VM
th
tsu
tW
tPHL
tPLH
VCC
VCC
GND
GND
VOL
VOH
Figure 2. Strobe (STR) to output (QPn) propagation delays and
the strobe pulse width and the clock set-up and hold times for
strobe input.


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