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AD9212 Arkusz danych(PDF) 3 Page - Analog Devices

Numer części AD9212
Szczegółowy opis  Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9212 Arkusz danych(HTML) 3 Page - Analog Devices

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AD9212
Rev. 0 | Page 3 of 56
SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −0.5 dBFS, unless otherwise noted.
Table 1.
AD9212-40
AD9212-65
Parameter1
Temperature
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
10
10
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Guaranteed
Offset Error
Full
±1.5
±8
±1.5
±8
mV
Offset Matching
Full
±3
±8
±3
±8
mV
Gain Error
Full
±0.4
±1.2
±3.2
±4.3
% FS
Gain Matching
Full
±0.3
±0.7
±0.4
±0.9
% FS
Differential Nonlinearity (DNL)
Full
±0.1
±0.4
±0.3
±0.65
LSB
Integral Nonlinearity (INL)
Full
±0.15
±0.5
±0.4
±1
LSB
TEMPERATURE DRIFT
Offset Error
Full
±2
±2
ppm/°C
Gain Error
Full
±17
±17
ppm/°C
Reference Voltage (1 V Mode)
Full
±21
±21
ppm/°C
REFERENCE
Output Voltage Error (VREF = 1 V)
Full
±2
±30
±2
±30
mV
Load Regulation @ 1.0 mA (VREF = 1 V)
Full
3
3
mV
Input Resistance
Full
6
6
ANALOG INPUTS
Differential Input Voltage Range (VREF = 1 V)
Full
2
2
V p-p
Common-Mode Voltage
Full
AVDD/2
AVDD/2
V
Differential Input Capacitance
Full
7
7
pF
Analog Bandwidth, Full Power
Full
325
325
MHz
POWER SUPPLY
AVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
V
DRVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
V
IAVDD
Full
252
260
390
405
mA
IDRVDD
Full
49.5
53
54
58
mA
Total Power Dissipation (Including Output Drivers)
Full
542
560
800
833
mW
Power-Down Dissipation
Full
3
11
3
11
mW
Standby Dissipation2
Full
83
95
mW
CROSSTALK
Full
−90
−90
dB
CROSSTALK (Overrange Condition)3
Full
−90
−90
dB
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed.
2 Can be controlled via SPI.
3 Overrange condition is specific with 6 dB of the full-scale input range.


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