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Functional Description

The LVX574 consists of eight edge-triggered flip-flops with

individual D-type inputs and 3-STATE true outputs. The

buffered clock and buffered Output Enable are common to

all flip-flops. The eight flip-flops will store the state of their

individual D inputs that meet the setup and hold time

requirements on the LOW-to-HIGH Clock (CP) transition.

With the Output Enable (OE) LOW, the contents of the

eight flip-flops are available at the outputs. When the OE is

HIGH, the outputs go to the high impedance state. Opera-

tion of the OE input does not affect the state of the flip-

flops.

Truth Table

H

HIGH Voltage Level

L

LOW Voltage Level

X

Immaterial

Z

High Impedance

 LOW-to-HIGH Transition

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Inputs

Outputs

CP

OE

H



LH

L



LL

XX

H

Z