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TPA2000D2PWG4 Arkusz danych(PDF) 2 Page - Texas Instruments |
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TPA2000D2PWG4 Arkusz danych(HTML) 2 Page - Texas Instruments |
2 / 20 page www.ti.com Gate Drive _ + Gate Drive _ + _ + _ + Gain Adjust Gain Adjust Start-Up Protection Logic OC Detect OC Detect Thermal VDD ok Ramp Generator Biases and References Gate Drive _ + Gate Drive _ + _ + _ + Gain Adjust Gain Adjust Gain 2 AGND VDD VDD PVDD RINN ROUTN PGND PVDD ROUTP PGND PVDD LOUTP PGND PVDD LOUTN PGND RINP SHUTDOWN GAIN1 GAIN0 COSC ROSC BYPASS LINP LINN TPA2000D2 SLOS291F – MARCH 2000 – REVISED MARCH 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback |
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