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MC100LVELT20D Arkusz danych(PDF) 4 Page - ON Semiconductor |
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MC100LVELT20D Arkusz danych(HTML) 4 Page - ON Semiconductor |
4 / 7 page MC100LVELT20 http://onsemi.com 4 1 2 3 4 5 6 7 8 9 INPUT CLOCK FREQUENCY (MHz) Jitter Figure 2. Output Voltage Amplitude (VOUTpp)/RMS Jitter vs. Input Clock Frequency at Ambient Temperature 0 200 400 600 800 1000 900 800 700 600 500 400 300 200 100 0 Amplitude Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) Driver Device Receiver Device QD Q D Zo = 50 W Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V ORDERING INFORMATION Device Package Shipping† MC100LVELT20D SOIC−8 98 Units / Rail MC100LVELT20DG SOIC−8 (Pb−Free) 98 Units / Rail MC100LVELT20DR2 SOIC−8 2500 / Tape & Reel MC100LVELT20DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. |
Podobny numer części - MC100LVELT20D |
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