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MC14007UBD Arkusz danych(PDF) 5 Page - ON Semiconductor |
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MC14007UBD Arkusz danych(HTML) 5 Page - ON Semiconductor |
5 / 9 page MC14007UB http://onsemi.com 5 Figure 5. Switching Time and Power Dissipation Test Circuit and Waveforms PULSE GENERATOR VDD 500 mF 0.01 mF CERAMIC 14 CL Vout VSS 7 Vin ID Vin Vout 90% 50% 10% 90% 50% 10% 20 ns 20 ns VDD VSS VOH VOL tTHL tTLH tPHL tPLH APPLICATIONS The MC14007UB dual pair plus inverter, which has access to all its elements offers a number of unique circuit applications. Figures 1, 6, and 7 are a few examples of the device flexibility. Figure 6. 3−State Buffer +V DD DISABLE3 INPUT10 DISABLE 6 12 OUTPUT 11 1 2 9 8 7 INPUT DISABLE OUTPUT 1 0 X 0 0 1 0 1 OPEN X = Don’t Care Figure 7. AOI Functions Using Tree Logic VDD 14 13 11 10 3 6 B C A 9 5 4 8 7 1 2 OUTPUT OUT = A+B•C Substrates of P−Channel devices internally connected to VDD; Substrates of N−Channel devices internally connected to VSS. 12 |
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