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MC14051BD Arkusz danych(PDF) 1 Page - ON Semiconductor |
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MC14051BD Arkusz danych(HTML) 1 Page - ON Semiconductor |
1 / 12 page © Semiconductor Components Industries, LLC, 2006 December, 2006 − Rev. 10 1 Publication Order Number: MC14051B/D MC14051B, MC14052B, MC14053B Analog Multiplexers/Demultiplexers The MC14051B, MC14052B, and MC14053B analog multiplexers are digitally−controlled analog switches. The MC14051B effectively implements an SP8T solid state switch, the MC14052B a DP4T, and the MC14053B a Triple SPDT. All three devices feature low ON impedance and very low OFF leakage current. Control of analog signals up to the complete supply voltage range can be achieved. Features • Triple Diode Protection on Control Inputs • Switch Function is Break Before Make • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Analog Voltage Range (VDD − VEE) = 3.0 to 18 V Note: VEE must be v VSS • Linearized Transfer Characteristics • Low−noise − 12 nV/√Cycle, f ≥ 1.0 kHz Typical • Pin−for−Pin Replacement for CD4051, CD4052, and CD4053 • For 4PDT Switch, See MC14551B • For Lower RON, Use the HC4051, HC4052, or HC4053 High−Speed CMOS Devices • Pb−Free Packages are Available* MAXIMUM RATINGS (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage Range (Referenced to VEE, VSS ≥ VEE) −0.5 to +18.0 V Vin, Vout Input or Output Voltage Range (DC or Transient) (Referenced to VSS for Control Inputs and VEE for Switch I/O) −0.5 to VDD + 0.5 V Iin Input Current (DC or Transient) per Control Pin +10 mA ISW Switch Through Current ±25 mA PD Power Dissipation per Package (Note 1) 500 mW TA Ambient Temperature Range −55 to +125 °C Tstg Storage Temperature Range −65 to +150 °C TL Lead Temperature (8−Second Soldering) 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65 _C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS, VEE or VDD). Unused outputs must be left open. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com MARKING DIAGRAMS PDIP−16 P SUFFIX CASE 648 MC1405xBCP AWLYYWWG SOIC−16 D SUFFIX CASE 751B TSSOP−16 DT SUFFIX CASE 948F SOEIAJ−16 F SUFFIX CASE 966 See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ORDERING INFORMATION 16 1 1405xBG AWLYWW 14 05xB ALYW G G 1 1 16 1 1 16 1 MC1405xB ALYWG 1 16 x = 1, 2, or 3 A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) 1 |
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