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MC14515BCP Arkusz danych(PDF) 1 Page - ON Semiconductor

Numer części MC14515BCP
Szczegółowy opis  4?묪it Transparent Latch / 4?뭪o??6 Line Decoder
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Producent  ONSEMI [ON Semiconductor]
Strona internetowa  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC14515BCP Arkusz danych(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 6
1
Publication Order Number:
MC14514B/D
MC14514B, MC14515B
4−Bit Transparent Latch /
4−to−16 Line Decoder
The MC14514B and MC14515B are two output options of a 4 to 16
line decoder with latched inputs. The MC14514B (output active high
option) presents a logical “1” at the selected output, whereas the
MC14515B (output active low option) presents a logical “0” at the
selected output. The latches are R−S type flip−flops which hold the
last input data presented prior to the strobe transition from “1” to “0”.
These high and low options of a 4−bit latch / 4 to 16 line decoder are
constructed with N−channel and P−channel enhancement mode
devices in a single monolithic structure. The latches are R−S type
flip−flops and data is admitted upon a signal incident at the strobe
input, decoded, and presented at the output.
These complementary circuits find primary use in decoding
applications where low power dissipation and/or high noise immunity
is desired.
Features
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load the Rated Temperature Range
Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
VDD
− 0.5 to +18.0
V
Input or Output Voltage Range
(DC or Transient)
Vin, Vout
− 0.5 to VDD
+0.5
V
Input or Output Current (DC or Transient)
per Pin
Iin, Iout
±10
mA
Power Dissipation per Package (Note 1)
PD
500
mW
Ambient Temperature Range
TA
− 55 to +125
°C
Storage Temperature Range
Tstg
− 65 to +150
°C
Lead Temperature (8−Second Soldering)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/
_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
xx
= 14 or 15
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
MARKING
DIAGRAMS
24
PDIP−24
P SUFFIX
CASE 709
1
24
SOIC−24
DW SUFFIX
CASE 751E
MC145xxBCP
AWLYYWWG
1
1
MC145xxB
AWLYYWWG
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
S5
S7
D2
D1
ST
S3
S4
S6
S10
D3
D4
INH
VDD
S15
S14
S9
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
13
11
12
21
22
23
24
S13
S12
S8
S11
S0
VSS
S2
S1
PIN ASSIGNMENT


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