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MC14553BDW Arkusz danych(PDF) 2 Page - ON Semiconductor |
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MC14553BDW Arkusz danych(HTML) 2 Page - ON Semiconductor |
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2 / 8 page  MC14553B http://onsemi.com 2 TRUTH TABLE Inputs Outputs Master Reset Clock Disable LE 0 0 0 No Change 0 0 0 Advance 0 X 1 X No Change 0 1 0 Advance 0 1 0 No Change 0 0 X X No Change 0 X X Latched 0 X X 1 Latched 1 X X 0 Q0 = Q1 = Q2 = Q3 = 0 X = Don’t Care ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Characteristic Symbol VDD Vdc − 55 _C 25 _C 125 _C Unit Min Max Min Typ (Note 2) Max Min Max Output Voltage “0” Level Vin = VDD or 0 VOL 5.0 10 15 − − − 0.05 0.05 0.05 − − − 0 0 0 0.05 0.05 0.05 − − − 0.05 0.05 0.05 Vdc “1” Level Vin = 0 or VDD VOH 5.0 10 15 4.95 9.95 14.95 − − − 4.95 9.95 14.95 5.0 10 15 − − − 4.95 9.95 14.95 − − − Vdc Input Voltage “0” Level (VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc) VIL 5.0 10 15 − − − 1.5 3.0 4.0 − − − 2.25 4.50 6.75 1.5 3.0 4.0 − − − 1.5 3.0 4.0 Vdc “1” Level (VO = 0.5 or 4.5 Vdc) (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc) VIH 5.0 10 15 3.5 7.0 11 − − − 3.5 7.0 11 2.75 5.50 8.25 − − − 3.5 7.0 11 − − − Vdc Output Drive Current (VOH = 4.6 Vdc) Source − (VOH = 9.5 Vdc) Pin 3 (VOH = 13.5 Vdc) IOH 5.0 10 15 – 0.25 – 0.62 – 1.8 − − − – 0.2 – 0.5 – 1.5 – 0.36 – 0.9 – 3.5 − − − −0.14 −0.35 −1.1 − − − mAdc (VOH = 4.6 Vdc) Source − (VOH = 9.5 Vdc) Other (VOH = 13.5 Vdc) Outputs 5.0 10 15 – 0.64 – 1.6 – 4.2 − − − – 0.51 – 1.3 – 3.4 – 0.88 – 2.25 – 8.8 − − − – 0.36 – 0.9 – 2.4 − − − mAdc (VOL = 0.4 Vdc) Sink − (VOL = 0.5 Vdc) Pin 3 (VOL = 1.5 Vdc) IOL 5.0 10 15 0.5 1.1 1.8 − − − 0.4 0.9 1.5 0.88 2.25 8.8 − − − 0.28 0.65 1.20 − − − mAdc (VOL = 0.4 Vdc) Sink − Other (VOL = 0.5 Vdc) Outputs (VOL = 1.5 Vdc) 5.0 10 15 3.0 6.0 18 − − − 2.5 5.0 15 4.0 8.0 20 − − − 1.6 3.5 10 − − − mAdc Input Current Iin 15 − ±0.1 − ±0.00001 ±0.1 − ±1.0 mAdc Input Capacitance (Vin = 0) Cin − − − − 5.0 7.5 − − pF Quiescent Current (Per Package) MR = VDD IDD 5.0 10 15 − − − 5.0 10 20 − − − 0.010 0.020 0.030 5.0 10 20 − − − 150 300 600 mAdc Total Supply Current (Note 3, 4) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) IT 5.0 10 15 IT = (0.35 mA/kHz) f + IDD IT = (0.85 mA/kHz) f + IDD IT = (1.50 mA/kHz) f + IDD mAdc 2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. 3. The formulas given are for the typical characteristics only at 25 _C. 4. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL – 50) Vfk where: IT is in mA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.004. |
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