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J113 Arkusz danych(PDF) 2 Page - NXP Semiconductors |
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J113 Arkusz danych(HTML) 2 Page - NXP Semiconductors |
2 / 6 page July 1993 2 Philips Semiconductors Product specification N-channel silicon field-effect transistors J111; J112; J113 DESCRIPTION Symmetrical silicon n-channel junction FETs in plastic TO-92 envelopes. They are intended for applications such as analog switches, choppers, commutators etc. FEATURES • High speed switching • Interchangeability of drain and source connections • Low R DS on at zero gate voltage PINNING Note: Drain and source are interchangeable. 1 = gate 2 = source 3 = drain Fig.1 Simplified outline and symbol, TO-92. handbook, halfpage 1 3 2 MAM042 s d g QUICK REFERENCE DATA J111 J112 J113 Drain-source voltage ±VDS max. 40 40 40 V Drain current VDS = 15 V; VGS =0 IDSS min. 20 5 2 mA Total power dissipation up to Tamb =50 °CPtot max. 400 400 400 mW Gate-source cut-off voltage min. max. 3 10 1 5 0.5 3 V V VDS = 5 V; ID =1 µA −VGS off Drain-source on-state resistance VDS = 0.1 V; VGS =0 RDS on max. 30 50 100 Ω |
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