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LF298 Arkusz danych(PDF) 3 Page - NXP Semiconductors |
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LF298 Arkusz danych(HTML) 3 Page - NXP Semiconductors |
3 / 5 page Philips Semiconductors Linear Products Product specification LF198/LF298/LF398 Sample-and-hold amplifiers August 31, 1994 881 DC ELECTRICAL CHARACTERISTICS Unless otherwise specified, the following conditions apply: unit is in “sample” mode; VS = ±15V; TJ = 25°C; -11.5V3 VIN ≤ +11.5V; CH=0.01µF; and RL = 10kΩ. Logic reference voltage = 0V and logic voltage = 2.5V. SYMBOL PARAMETER TEST CONDITIONS LF198/LF298 LF398 UNIT SYMBOL PARAMETER TEST CONDITIONS Min Typ Max Min Typ Max UNIT VOS Input offset voltage4 TJ=25°C 1 3 2 7 mV VOS Input offset voltage4 Full temperature range 5 10 mV IBIAS Input bias current4 TJ=25°C 5 25 10 50 nA IBIAS Input bias current4 Full temperature range 75 100 nA Input impedance TJ=25°C 1010 1010 Ω Gain error TJ=25°C, RL=10k 0.002 0.005 0.004 0.01 % Gain error Full temperature range 0.02 0.02 % Feedthrough attenuation ratio at 1kHz TJ=25°C, Ch=0.01µF 86 96 80 90 dB Output impedance TJ=25°C, “HOLD“ mode 0.5 2 0.5 4 Ω Output impedance Full temperature range 4 6 Ω “HOLD“ step2 TJ=25°C, Ch=0.01µF, VOUT=0 0.5 2.0 1.0 2.5 mV ICC Supply current4 TJ ≤ 25°C 4.5 5.5 4.5 6.5 mA Logic and logic reference input current TJ = 25°C 2 10 2 10 µA Leakage current into hold capacitor4 TJ=25°C, “HOLD“ mode 30 100 30 200 pA tAC Acquisition time to 0.1% ∆VOUT=10V, Ch=1000pF 4 4 µs tAC Acquisition time to 0.1% Ch=0.01µF 20 20 µs Hold capacitor charging current VIN-VOUT=2V 5 5 mA Supply voltage rejection ratio VOUT=0 80 110 80 110 dB Differential logic threshold TJ=25°C 0.8 1.4 2.4 0.8 1.4 2.4 V NOTES: 1. Unless otherwise specified, the following conditions apply. Unit is in “sample“ mode, VS=±15V, TJ=25°C, -11.5V ≤ VIN ≤ +11.5V, Ch = 0.01µF, and RL = 10kΩ. Logic reference voltage = 0V and logic voltage = 2.5V. 2. Hold step is sensitive to stray capacitive coupling between input logic signals and the hold capacitor. 1pF, for instance, will create an additional 0.5mV step with a 5V logic swing and a 0.01 µF hold capacitor. Magnitude of the hold step is inversely proportional to hold capacitor value. 3. Leakage current is measured at a junction temperature of 25 °C. The effects of junction temperature rise due to power dissipation or elevated ambient can be calculated by doubling the 25 °C value for each 11°C increase in chip temperature. Leakage is guaranteed over full input signal range. 4. The parameters are guaranteed over a supply voltage of ±5 to ±18V. |
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Podobny opis - LF298 |
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