Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AM29DL400B Arkusz danych(PDF) 11 Page - Advanced Micro Devices

Numer części AM29DL400B
Szczegółowy opis  4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
Download  47 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AMD [Advanced Micro Devices]
Strona internetowa  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29DL400B Arkusz danych(HTML) 11 Page - Advanced Micro Devices

Back Button AM29DL400B Datasheet HTML 7Page - Advanced Micro Devices AM29DL400B Datasheet HTML 8Page - Advanced Micro Devices AM29DL400B Datasheet HTML 9Page - Advanced Micro Devices AM29DL400B Datasheet HTML 10Page - Advanced Micro Devices AM29DL400B Datasheet HTML 11Page - Advanced Micro Devices AM29DL400B Datasheet HTML 12Page - Advanced Micro Devices AM29DL400B Datasheet HTML 13Page - Advanced Micro Devices AM29DL400B Datasheet HTML 14Page - Advanced Micro Devices AM29DL400B Datasheet HTML 15Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 47 page
background image
Am29DL400B
9
The device features an Unlock Bypass mode to fa-
cilitate faster programming. Once a bank enters the
Unlock Bypass mode, only two write cycles are re-
quired to program a word or byte, instead of four.
The “Byte/Word Program Command Sequence” sec-
tion has details on programming data to the device
using both standard and Unlock Bypass command
sequences.
An erase operation can erase one sector, multiple
sectors, or the entire device. Tables 2 and 3 indicate
the address space that each sector occupies. The de-
vice address space is divided into two banks: Bank 1
contains the boot/parameter sectors, and Bank 2
contains the larger, code sectors of uniform size. A
“bank address” is the address bits required to
uniquely select a bank. Similarly, a “sector address”
is the address bits required to uniquely select a
sector.
If the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the in-
ternal register (which is separate from the memory
array) on DQ7–DQ0. Standard read cycle timings
apply in this mode. Refer to the Autoselect Mode and
Autoselect Command Sequence sections for more
information.
ICC2 in the DC Characteristics table represents the
active current specification for the write mode. The
AC Characteristics section contains timing specifica-
tion tables and timing diagrams for write operations.
Simultaneous Read/Write Operations with
Zero Latency
This device is capable of reading data from one bank
of memory while programming or erasing in the
other bank of memory. An erase operation may also
be suspended to read from or program to another lo-
cation within the same bank (except the sector being
erased). Figure 19 shows how read and write cycles
may be initiated for simultaneous operation with
zero latency. ICC6 and ICC7 in the DC Characteristics
table represent the current specifications for read-
while-program and read-while-erase, respectively.
Standby Mode
When the system is not reading or writing to the de-
vice, it can place the device in the standby mode. In
this mode, current consumption is greatly reduced,
and the outputs are placed in the high impedance
state, independent of the OE# input.
The device enters the CMOS standby mode when the
CE# and RESET# pins are both held at VCC ± 0.3 V.
(Note that this is a more restricted voltage range
than VIH.) If CE# and RESET# are held at VIH, but
not within VCC ± 0.3 V, the device will be in the
standby mode, but the standby current will be
greater. The device requires standard access time
(tCE) for read access when the device is in either of
these standby modes, before it is ready to read data.
The device also enters the standby mode when the
RESET# pin is driven low. Refer to the next section,
“RESET#: Hardware Reset Pin”.
If the device is deselected during erasure or pro-
gramming, the device draws active current until the
operation is completed.
ICC3 in the DC Characteristics table represents the
standby current specification.
Automatic Sleep Mode
The automatic sleep mode minimizes Flash device
energy consumption. The device automatically en-
ables this mode when addresses remain stable for
tACC + 30 ns. The automatic sleep mode is indepen-
dent of the CE#, WE#, and OE# control signals.
Standard address access timings provide new data
when addresses are changed. While in sleep mode,
output data is latched and always available to the
system. ICC4 in the DC Characteristics table repre-
sents the au tomatic sl eep m o de curr ent
specification.
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of re-
setting the device to reading array data. When the
RESET# pin is driven low for at least a period of tRP,
the device immediately terminates any operation
in progress, tristates all output pins, and ignores all
read/write commands for the duration of the RE-
SET# pulse. The device also resets the internal state
machine to reading array data. The operation that
was interrupted should be reinitiated once the device
is ready to accept another command sequence, to
ensure data integrity.
Current is reduced for the duration of the RESET#
pulse. When RESET# is held at VSS±0.3 V, the device
draws CMOS standby current (ICC4). If RESET# is
held at VIL but not within VSS±0.3 V, the standby
current will be greater.
The RESET# pin may be tied to the system reset cir-
cuitry. A system reset would thus also reset the
Flash memory, enabling the system to read the
boot-up firmware from the Flash memory.
If RESET# is asserted during a program or erase op-
eration, the RY/BY# pin remains a “0” (busy) until
the internal reset operation is complete, which re-
q u ir e s a t i m e o f t READY (during Embedded
Algorithms). The system can thus monitor RY/BY# to
determine whether the reset operation is complete.
If RESET# is asserted when a program or erase op-
eration is not executing (RY/BY# pin is “1”), the
reset operation is completed within a time of tREADY
(not during Embedded Algorithms). The system can
read data tRH after the RESET# pin returns to VIH.
Refer to the AC Characteristics tables for RESET#
parameters and to Figure 14 for the timing diagram.


Podobny numer części - AM29DL400B

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Advanced Micro Devices
AM29DL400B AMD-AM29DL400B Datasheet
534Kb / 42P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
AM29DL400BB-120EC AMD-AM29DL400BB-120EC Datasheet
534Kb / 42P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
AM29DL400BB-120ECB AMD-AM29DL400BB-120ECB Datasheet
534Kb / 42P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
AM29DL400BB-120EE AMD-AM29DL400BB-120EE Datasheet
534Kb / 42P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
AM29DL400BB-120EEB AMD-AM29DL400BB-120EEB Datasheet
534Kb / 42P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
More results

Podobny opis - AM29DL400B

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Advanced Micro Devices
AM29DL400B AMD-AM29DL400B Datasheet
534Kb / 42P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
AM29LV400B AMD-AM29LV400B_03 Datasheet
382Kb / 14P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory
AM29LV400 AMD-AM29LV400 Datasheet
516Kb / 40P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
AM29LV400B AMD-AM29LV400B Datasheet
47Kb / 7P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
logo
SPANSION
AM29LV400BT-90EC SPANSION-AM29LV400BT-90EC Datasheet
1Mb / 48P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
AM29LV400BB-90EC SPANSION-AM29LV400BB-90EC Datasheet
1Mb / 48P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
AM29LV400BT-70EI SPANSION-AM29LV400BT-70EI Datasheet
1Mb / 48P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
AM29LV400BT-70SC SPANSION-AM29LV400BT-70SC Datasheet
1Mb / 48P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
logo
Advanced Micro Devices
AM29DL800B AMD-AM29DL800B Datasheet
580Kb / 43P
   8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
AM29DL800B AMD-AM29DL800B_06 Datasheet
1Mb / 46P
   8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com