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AM29DL640G35WHE Arkusz danych(PDF) 5 Page - SPANSION

Numer części AM29DL640G35WHE
Szczegółowy opis  64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
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June 6, 2005
Am29DL640G
3
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 7
Special Handling Instructions for BGA Packages ..................... 7
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Am29DL640G Device Bus Operations ..............................10
Word/Byte Configuration ........................................................ 10
Requirements for Reading Array Data ................................... 10
Writing Commands/Command Sequences ............................ 11
Accelerated Program Operation ............................................. 11
Autoselect Functions .............................................................. 11
Simultaneous Read/Write Operations with Zero Latency ....... 11
Standby Mode ........................................................................ 11
Automatic Sleep Mode ........................................................... 12
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 12
Table 2. Am29DL640G Sector Architecture ....................................12
Table 3. Bank Address ....................................................................15
Table 4. SecSiTM Sector Addresses ................................................15
Autoselect Mode..................................................................... 15
Table 5. Am29DL640G Autoselect Codes, (High Voltage Method) 16
Sector/Sector Block Protection and Unprotection .................. 17
Table 6. Am29DL640G Boot Sector/Sector Block Addresses for
Protection/Unprotection ...................................................................17
Write Protect (WP#) ................................................................ 17
Table 7. WP#/ACC Modes ..............................................................18
Temporary Sector Unprotect .................................................. 18
Figure 1. Temporary Sector Unprotect Operation........................... 18
Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 19
SecSi™ (Secured Silicon) Sector
Flash Memory Region ............................................................ 20
Figure 3. SecSi Sector Protect Verify.............................................. 21
Hardware Data Protection ...................................................... 21
Low VCC Write Inhibit ............................................................ 21
Write Pulse “Glitch” Protection ............................................... 21
Logical Inhibit .......................................................................... 21
Power-Up Write Inhibit ............................................................ 21
Common Flash Memory Interface (CFI) . . . . . . . 21
Table 8. CFI Query Identification String .......................................... 22
Table 9. System Interface String......................................................22
Table 10. Device Geometry Definition ............................................ 23
Table 11. Primary Vendor-Specific Extended Query ...................... 24
Command Definitions . . . . . . . . . . . . . . . . . . . . . 25
Reading Array Data ................................................................ 25
Reset Command ..................................................................... 25
Autoselect Command Sequence ............................................ 25
Enter SecSi™ Sector/Exit SecSi Sector
Command Sequence .............................................................. 25
Byte/Word Program Command Sequence ............................. 26
Unlock Bypass Command Sequence ..................................... 26
Figure 4. Program Operation .......................................................... 27
Chip Erase Command Sequence ........................................... 27
Sector Erase Command Sequence ........................................ 27
Figure 5. Erase Operation............................................................... 28
Erase Suspend/Erase Resume Commands ........................... 28
Table 12. Am29DL640G Command Definitions ............................. 29
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 30
DQ7: Data# Polling ................................................................. 30
Figure 6. Data# Polling Algorithm .................................................. 30
RY/BY#: Ready/Busy#............................................................ 31
DQ6: Toggle Bit I .................................................................... 31
Figure 7. Toggle Bit Algorithm........................................................ 31
DQ2: Toggle Bit II ................................................................... 32
Reading Toggle Bits DQ6/DQ2 ............................................... 32
DQ5: Exceeded Timing Limits ................................................ 32
DQ3: Sector Erase Timer ....................................................... 32
Table 13. Write Operation Status ................................................... 33
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 34
Figure 8. Maximum Negative Overshoot Waveform ...................... 34
Figure 9. Maximum Positive Overshoot Waveform........................ 34
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 10. I
CC1 Current vs. Time (Showing Active and
Automatic Sleep Currents) ............................................................. 36
Figure 11. Typical I
CC1 vs. Frequency ............................................ 36
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 12. Test Setup.................................................................... 37
Figure 13. Input Waveforms and Measurement Levels ................. 37
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38
Read-Only Operations ........................................................... 38
Figure 14. Read Operation Timings ............................................... 38
Hardware Reset (RESET#) .................................................... 39
Figure 15. Reset Timings ............................................................... 39
Word/Byte Configuration (BYTE#) .......................................... 40
Figure 16. BYTE# Timings for Read Operations............................ 40
Figure 17. BYTE# Timings for Write Operations............................ 40
Erase and Program Operations .............................................. 41
Figure 18. Program Operation Timings.......................................... 42
Figure 19. Accelerated Program Timing Diagram .......................... 42
Figure 20. Chip/Sector Erase Operation Timings .......................... 43
Figure 21. Back-to-back Read/Write Cycle Timings ...................... 44
Figure 22. Data# Polling Timings (During Embedded Algorithms). 44
Figure 23. Toggle Bit Timings (During Embedded Algorithms)...... 45
Figure 24. DQ2 vs. DQ6................................................................. 45
Temporary Sector Unprotect .................................................. 46
Figure 25. Temporary Sector Unprotect Timing Diagram .............. 46
Figure 26. Sector/Sector Block Protect and
Unprotect Timing Diagram ............................................................. 47
Alternate CE# Controlled Erase and Program Operations ..... 48
Figure 27. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.......................................................................... 49
Erase And Programming Performance. . . . . . . . 50
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 50
TSOP & BGA Pin Capacitance. . . . . . . . . . . . . . . 50
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 52
FBE063—63-Ball Fine-Pitch Ball Grid Array (FBGA)
12 x 11 mm package .............................................................. 52
LAA064—64-Ball Fortified Ball Grid Array (FBGA)
13 x 11 mm package .............................................................. 53
TS 048—48-Pin Standard TSOP ............................................ 54
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 55


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