DM74LS73AW datasheet(2/6 Pages) NSC

Numer części	DM74LS73AW

Szczegółowy opis	Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

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Absolute Maximum Ratings (Note)

If MilitaryAerospace specified devices are required

please contact the National Semiconductor Sales

OfficeDistributors for availability and specifications

Supply Voltage

7V

Input Voltage

7V

Operating Free Air Temperature Range

DM54LS

b

55 Cto a125 C

DM74LS

0 Cto a70 C

Storage Temperature Range

b

65 Cto a150 C

Note

The ‘‘Absolute Maximum Ratings’’ are those values

beyond which the safety of the device cannot be guaran-

teed The device should not be operated at these limits The

parametric values defined in the ‘‘Electrical Characteristics’’

table are not guaranteed at the absolute maximum ratings

The ‘‘Recommended Operating Conditions’’ table will define

the conditions for actual device operation

Recommended Operating Conditions

Symbol

Parameter

DM54LS73A

DM74LS73A

Units

Min

Nom

Max

Min

Nom

Max

VCC

Supply Voltage

45

5

55

475

5

525

V

VIH

High Level Input Voltage

2

V

VIL

Low Level Input Voltage

07

08

V

IOH

High Level Output Current

b

04

b

04

mA

IOL

Low Level Output Current

4

8

mA

fCLK

Clock Frequency (Note 2)

0

30

0

30

MHz

fCLK

Clock Frequency (Note 3)

0

25

0

25

MHz

tW

Pulse Width

Clock High

20

(Note 2)

Preset Low

25

ns

Clear Low

25

tW

Pulse Width

Clock High

25

(Note 3)

Preset Low

30

ns

Clear Low

30

tSU

Setup Time (Notes 1 and 2)

20

v

20

v

ns

tSU

Setup Time (Notes 1 and 3)

25

v

25

v

ns

tH

Hold Time (Notes 1 and 2)

0

v

0

v

ns

tH

Hold Time (Notes 1 and 3)

5

v

5

v

ns

TA

Free Air Operating Temperature

b

55

125

0

70

C

Note 1

The symbol (

v) indicates the falling edge of the clock pulse is used for reference

Note 2

CL e 15 pF RL e 2kX TA e 25 C and VCC e 5V

Note 3

CL e 50 pF RL e 2kX TA e 25 C and VCC e 5V

2

Podobny numer części - DM74LS73AW

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Fairchild Semiconductor	DM74LS73A	53Kb / 5P	Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
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National Semiconductor ...	DM54107	78Kb / 3P	DUAL MASTER-SLAVE J-K FLIP-FLOPS WITH CLEAR AND COMPLEMENTARY OUTPUTS
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	DM7476	47Kb / 4P	Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs
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