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ST16C454IJ68 Arkusz danych(PDF) 9 Page - Exar Corporation |
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ST16C454IJ68 Arkusz danych(HTML) 9 Page - Exar Corporation |
9 / 29 page ST16C454 9 Rev. 3.31 GENERAL DESCRIPTION The 454 provides serial asynchronous receive data synchronization, parallel-to-serial and serial-to-parallel data conversions for both the transmitter and receiver sections. These functions are necessary for converting the serial data stream into parallel data that is required with digital data systems. Synchronization for the serial data stream is accomplished by adding start and stops bits to the transmit data to form a data character (character orientated protocol). Data integrity is insured by attaching a parity bit to the data character. The parity bit is checked by the receiver for any transmission bit errors. The electronic circuitry to provide all these functions is fairly complex especially when manufac- tured on a single integrated silicon chip. The ST16C454 represents such an integration with greatly enhanced features. The 454 is fabricated with an advanced CMOS process to achieve low drain power and high speed requirements. The 454 combines the package interface modes of the ST16C454 and ST68C454 series on a single inte- grated chip. The 16 mode interface is designed to operate with the Intel type of microprocessor bus while the 68 mode is intended to operate with Motorola, and other popular microprocessors. The 454 is capable of operation to 1.5Mbps with a 24 MHz crystal or external clock input. With a crystal of 14.7464 MHz, the user can select data rates up to 921.6Kbps. The rich feature set of the 454 is available through internal registers. Selectable TX and RX baud rates, modem interface controls. In the 16 mode INTSEL and MCR bit-3 can be configured to provide a software controlled or continuous interrupt capability. FUNCTIONAL DESCRIPTIONS Interface Options Two user interface modes are selectable for the 454 package. These interface modes are designated as the “16 mode” and the “68 mode.” This nomenclature corresponds to the early ST16C454 and ST68C454 package interfaces respectively. The 16 Mode Interface The 16 mode configures the package interface pins for connection as a standard 16 series (Intel) device and operates similar to the standard CPU interface avail- able on the ST16C454. In the 16 mode (pin 16/-68 logic 1) each UART is selected with individual chip select (- CSx) pins as shown in Table 2 below. Table 2, SERIAL PORT CHANNEL SELECTION GUIDE, 16 MODE INTERFACE -CSA -CSB -CSC -CSD UART CHANNEL 1 1 1 1 None 0111 A 1011 B 1101 C 1110 D The 68 Mode Interface The 68 mode configures the package interface pins for connection with Motorola, and other popular micro- processor bus types. The interface operates similar to the ST68C454. In this mode the 454 decodes two additional addresses, A3-A4 to select one of the four UART ports. The A3-A4 address decode function is used only when in the 68 mode (16/-68 logic 0), and is shown in Table 3 below. Table 3, SERIAL PORT CHANNEL SELECTION GUIDE, 68 MODE INTERFACE -CS A4 A3 UART CHANNEL 1 N/A N/A None 000 A 001 B 010 C 011 D |
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