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TDA1310AT Arkusz danych(PDF) 7 Page - NXP Semiconductors |
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TDA1310AT Arkusz danych(HTML) 7 Page - NXP Semiconductors |
7 / 16 page May 1994 7 Philips Semiconductors Preliminary specification Stereo Continuous Calibration DAC (CC-DAC) TDA1310A CHARACTERISTICS VDD =5V; Tamb =25 °C; measured in Fig.1; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD supply voltage 3.0 5.0 5.5 V IDD supply current at code 0000H − 3.0 4.0 mA SVRR supply voltage ripple rejection note 1 − 30 − dB Digital inputs; pins WS, BCK and DATA |I IL| input leakage current LOW VI =0V −− 10 µA |IIH| input leakage current HIGH VI =5V −− 10 µA fclk clock frequency −− 18.4 MHz BR bit rate data input −− 18.4 Mbits/s fWS word select input frequency −− 384 kHz Timing (see Fig.4) tr rise time −− 12 ns tf fall time −− 12 ns tCY bit clock cycle time 54 −− ns tBCKH bit clock pulse width HIGH 15 −− ns tBCKL bit clock pulse width LOW 15 −− ns tSU;DAT data set-up time 12 −− ns tHD:DAT data hold time to bit clock 2 −− ns tHD:WS word select hold time 2 −− ns tSU;WS word select set-up time 12 −− ns Analog input; pin Iref Rref reference resistor see Fig.1 7.4 11.0 14.6 k Ω Analog outputs; pins IOL and IOR RES resolution −− 16 bits VDCC DC output voltage compliance 2.0 − VDD − 1V IFS full-scale current 0.9 1.0 1.1 mA TCFS full-scale temperature coefficient −±400 × 10−6 − Ibias bias current 643 714 785 µA GFS reference input current to full scale output current gain 11.9 13.2 14.5 Gbias reference input current to bias current gain 8.48 9.42 10.36 |
Podobny numer części - TDA1310AT |
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Podobny opis - TDA1310AT |
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