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ST62T80B Arkusz danych(PDF) 19 Page - STMicroelectronics |
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ST62T80B Arkusz danych(HTML) 19 Page - STMicroelectronics |
19 / 80 page 19/80 ST62T80B/E80B CLOCK SYSTEM (Cont’d) 3.1.2 32 KHz STAND-BY OSCILLATOR An additional 32KHz stand-by on chip oscillator al- lows to generate real time interrupts and to supply the clock to the LCD driver with the main oscillator stopped. This enables the MCU to perform real time functions with the LCD display running while keeping advantages of low power consumption. Figure 10 shows the 32KHz oscillator block dia- gram. A 32.768KHz quartz crystal must be connected to the OSC32in and OSC32out pins to perform the real time clock operation. Two external capacitors of 15-22pF each must be connected between the oscillator pins and ground. The 32KHz oscillator is managed by the dedicated status/control register 32OCR. As long as the 32KHz stand-by oscillator is ena- bled, 32KHz internal clock is available to drive LCD controller driver. This clock is divide by 214 to generate interrupt request every 500ms . The peri- odic interrupt request serves as reference time- base for real time functions. Note: When the 32KHz stand-by oscillator is stopped (bit 5 of the Status/Control register cleared) the divider chain is supplied with a clock signal synchronous with machine cycle (fINT/13), this produces an interrupt request every 13x214 clock cycle (i.e. 26.624ms) with an 8MHz quartz crystal. 32KHz Oscillator Register (32OCR) Address: DBh - Read/Write Bit 7 = EOSCI. Enable Oscillator Interrupt. This bit, when set, enables the 32KHz oscillator interrupt request. Bit 6 = OSCEOC. Oscillator Interrupt Flag. This bit indicates when the 32KHz oscillator has measured a 500ms elapsed time (providing a 32.768KHzquartz crystal is connected to the 32KHz oscillator dedicated pins). An interrupt re- quest can be generated in relation to the state of EOSCI bit. This bit must be cleared by the user program before leaving the interrupt service rou- tine. Bit 5 = START/STOP. Oscillator Start/Stop bit. This bit, when set, enables the 32KHz stand-by oscillator and the free running divider chain is sup- plied by the 32KHz oscillator signal. When this bit is cleared to zero the divider chain is supplied with fINT/13. This register is cleared during reset. Note: To achieve minimum power consumption in STOP mode (no system clock), the stand-by oscillator must be switched off (real time function not availa- ble) by clearing the Start/Stop bit in the oscillator status/control register. Figure 10. 32KHz Oscillator Block Diagram 70 EOSCI OSCEOC S/S D4 D3 D2 D1 D0 OSC32KHz EOSCI OSCEOC START STOP X X XXX INT OSC32IN OSC32OUT 2x15...22pF 32.768KHz Crystal fINT/13 OSC32KHz MUX 1 0 DIV 214 19 |
Podobny numer części - ST62T80B_07 |
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Podobny opis - ST62T80B_07 |
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