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74LV259PW Arkusz danych(PDF) 5 Page - NXP Semiconductors |
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74LV259PW Arkusz danych(HTML) 5 Page - NXP Semiconductors |
5 / 19 page 74LV259_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 2 January 2008 5 of 19 NXP Semiconductors 74LV259 8-bit addressable latch 7. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Ptot derates linearly with 12 mW/K above 70 °C. [3] Ptot derates linearly with 8 mW/K above 70 °C. [4] Ptot derates linearly with 5.5 mW/K above 60 °C. [5] Ptot derates linearly with 4.5 mW/K above 60 °C. 8. Recommended operating conditions [1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to VCC = 1.0 V (with input levels GND or VCC). Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +4.6 V IIK input clamping current VI < −0.5 V or VI >VCC + 0.5 V [1] - ±20 mA IOK output clamping current VO < −0.5 V or VO >VCC + 0.5 V [1] - ±50 mA IO output current VO = −0.5 V to (VCC + 0.5 V) - ±25 mA ICC supply current - 50 mA IGND ground current −50 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C DIP16 package [2] - 750 mW SO16 package [3] - 500 mW (T)SSOP16 package [4] - 500 mW DHVQFN16 package [5] - 500 mW Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage [1] 1.0 3.3 3.6 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C ∆t/∆V input transition rise and fall rate VCC = 1.0 V to 2.0 V - - 500 ns/V VCC = 2.0 V to 2.7 V - - 200 ns/V VCC = 2.7 V to 3.6 V - - 100 ns/V |
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Podobny opis - 74LV259PW |
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