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M41T11MH6E Arkusz danych(PDF) 11 Page - STMicroelectronics

Numer części M41T11MH6E
Szczegółowy opis  Serial Real Time Clock with 56 Bytes of NVRAM
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Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

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M41T11
Operation
11/29
Table 2.
AC characteristics
2.2
READ Mode
In this mode, the master reads the M41T11 slave after setting the slave address (see
Figure 8). Following the write Mode Control Bit (R/W = 0) and the Acknowledge Bit, the word
address An is written to the on-chip address pointer. Next the START condition and slave
address are repeated, followed by the READ Mode Control Bit (R/W = 1). At this point, the
master transmitter becomes the master receiver. The data byte which was addressed will be
transmitted and the master receiver will send an Acknowledge Bit to the slave transmitter.
The address pointer is only incremented on reception of an Acknowledge Bit. The M41T11
slave transmitter will now place the data byte at address An + 1 on the bus. The master
receiver reads and acknowledges the new byte and the address pointer is incremented to
An + 2.
This cycle of reading consecutive addresses will continue until the master receiver sends a
STOP condition to the slave transmitter.
An alternate READ mode may also be implemented, whereby the master reads the M41T11
slave without first writing to the (volatile) address pointer. The first address that is read is the
last one stored in the pointer (see Figure 10 on page 12).
Symbol
Parameter(1)
1.
Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.0 to 5.5V (except where noted).
Min
Max
Unit
fSCL
SCL clock frequency
0
100
kHz
tLOW
Clock low period
4.7
µs
tHIGH
Clock high period
4
µs
tR
SDA and SCL rise time
1
µs
tF
SDA and SCL fall time
300
ns
tHD:STA
START condition hold time
(after this period the first clock pulse is generated)
4µs
tSU:STA
START condition setup time
(only relevant for a repeated start condition)
4.7
µs
tSU:DAT
Data setup time
250
ns
tHD:DAT
(2)
2.
Transmitter must internally provide a hold time to bridge the undefined region (300ns max.) of the falling
edge of SCL.
Data hold time
0
µs
tSU:STO
STOP condition setup time
4.7
µs
tBUF
Time the bus must be free before a new transmission can start
4.7
µs


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