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ST1480ABDR Arkusz danych(PDF) 8 Page - STMicroelectronics |
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ST1480ABDR Arkusz danych(HTML) 8 Page - STMicroelectronics |
8 / 22 page Electrical characteristics ST1480A 8/22 Note: 1 ∆V OD and ∆VOC are the changes in VOD and VOC, respectively, when the DI input changes state. 2 Measured on |tPLH(A)-tPHL(A)| and |tPLH(B)-tPHL(B)| 3 The transceivers are put into shutdown by bring RE high and DE low. If the input are in state for less than 80ns, the part are guaranteed not to enter shutdown. If the inputs are in this state for at least 300ns, the parts are guaranteed to have entered shutdown. Table 11. Receiver switching characteristics VCC = 3V to 3.6V, TA = -40 to 85°C, unless otherwise specified. Typical values are referred to Ta = 25°C) Symbol Parameter Test Conditions Min. Typ. Max. Unit tPLH tPHL Propagation delay VID= 0V to 3V, CL1 =15pF (Figure 12. and Figure 13.) 30 50 ns tRPDS |tPLH - tPHL| Propagation delay skew VID= 0V to 3V, CL1 = 15pF (Figure 12. and Figure 13.) 13 ns tPZL Output enable time CRL = 15pF, (Figure 14. and Figure 18.)10 20 ns tPZH Output enable time CRL = 15pF, (Figure 14. and Figure 18.)10 20 ns tPHZ Output disable time CRL = 15pF, (Figure 14. and Figure 18.)10 20 ns tPLZ Output disable time CRL = 15pF, (Figure 14. and Figure 18.)10 20 ns tZH(SHDN) Receiver enable from shutdown to output high CRL = 15pF, (Figure 14. and Figure 18.)10 20 ns tZL(SHDN) Receiver enable from shutdown to output low CRL = 15pF, (Figure 14. and Figure 18.)20 40 µs |
Podobny numer części - ST1480ABDR |
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Podobny opis - ST1480ABDR |
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