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ST20C4 Arkusz danych(PDF) 7 Page - STMicroelectronics |
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ST20C4 Arkusz danych(HTML) 7 Page - STMicroelectronics |
7 / 212 page 7/212 ® 1.5 Error signals This section lists the errors and other exceptional conditions that can be signalled by the instruction. This only indicates the error signal, not the action that will be taken by the processor - this will depend on the trap enable bits which are set, the value in the trap handler location, etc. The order of the error signals listed is significant in that if a par ticular error is signalled then errors later in the list may not be signalled. The errors that may be signalled are as follows: IntegerError indicates a variety of general errors such as a value out of range. IntegerOverflow indicates that an overflow occurred during an integer arithme- tic operation. LoadTrap indicates that an attempt has been made to load a new trap handler. This provides a basic mechanism for a supervisor kernel to manage user proc- esses installing trap handlers. StoreTrap, analogous to LoadTrap, indicates that an attempt has been made to store a trap handler so that it can be inspected. Again this allows a supervisor kernel to manage the trap system used by user processes. Example As an example, the error signals listed for the add instruction are: Error signals: IntegerOverflow can be signalled by +checked So, the only error that can be caused by add is an integer overflow during the addition of Areg and Breg. 1.6 Comments This section is used for listing other information about the instructions that may be of interest. Firstly, there is an indication of the type of the instruction. These are: “Primary instruction” — indicates one of the 13 functions which are directly encoded in a single byte instruction. “Secondar y instruction” — indicates an instruction which is encoded using opr. Then there is information concerning the scheduling of the process: “Instruction is a descheduling point” — a process may be descheduled after executing this instruction. “Instruction is a timeslicing point” — a process may be timesliced after execut- ing this instruction. “Instruction is interruptible” — the execution of this instruction may be inter- rupted by a high priority process. |
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