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AD1884AJCPZ Arkusz danych(PDF) 11 Page - Analog Devices |
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AD1884AJCPZ Arkusz danych(HTML) 11 Page - Analog Devices |
11 / 20 page AD1884A Rev. 0 | Page 11 of 20 | March 2008 POWER AND GROUND DVCORE 1.7 V to 1.9 V or FILTER 1 I/O CAUTION: DO NOT APPLY 3.3 V TO THIS PIN! Filter connection for internal core voltage regulator. If Pin 9 is connected to 3.3 V DVDD, this pin must be connected to filter caps: 10 μF, 1.0 μF, and 0.1μF connected in parallel between Pin 1 and DV SS (Pin 7). Direct, filtered 1.7 V to 1.9 V DVDD can be applied to Pin 1 to lower the digital power requirements. Pin 9 MUST be connected to Pin 1 in this case. DVIO 1.5 V or 3.3 V 3 I Link Digital I/O Voltage Reference. 3.3 V ± 10% or 1.5 V ± 5.5% DVSS 7 I Digital Supply Return (Ground). DVDD 1.7 V to 1.9 V or 3.3 V 9 I Digital Supply Voltage 3.3 V ± 10%. This is regulated down to DV CORE on Pin 1 to supply the internal digital core internal to the AD1884A. Direct, filtered 1.7 V to 1.9 V DVDD can be applied to Pin 1 to lower the digital power requirements. Pin 9 MUST be connected to Pin 1 in this case. AVDD 3.3 V 25, 38 I CAUTION: DO NOT APPLY 5 V TO THESE PINS! Analog Supply Voltage 3.3 V ± 5%. Note: AVDD supplies should be well regulated and filtered as supply noise degrades audio performance. AVSS 26, 42 I Analog Supply Return (Ground). AVSS should be connected to DVSS using a conductive trace under, or close to, the AD1884A. Table 4. Pin Function Descriptions (Continued) Mnemonic Pin No. I/O Description The symbols used in this table are defined as: I = input, O = output, LI = line level input, LO = line level output, HP = output capable of driving headphone load, MIC = input supports microphones with MIC bias and boost amplifier. |
Podobny numer części - AD1884AJCPZ |
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Podobny opis - AD1884AJCPZ |
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