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74LCXH16245 Arkusz danych(PDF) 1 Page - STMicroelectronics |
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74LCXH16245 Arkusz danych(HTML) 1 Page - STMicroelectronics |
1 / 10 page 1/10 July 2003 s 5V TOLERANT INPUTS AND OUTPUTS s HIGH SPEED: tPD = 4.5 ns (MAX.) at VCC =3V s POWER DOWN PROTECTION ON INPUTS AND OUTPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|= IOL = 24mA (MIN) at VCC =3V s PCI BUS LEVELS GUARANTEED AT 24 mA s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 2.0V to 3.6V (1.5V Data Retention) s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES H16245 s BUS HOLDPROVIDEDONBOTH SIDES s LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17) s ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V DESCRIPTION The 74LCXH16245 is a low voltage CMOS 16 BIT BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. This IC is intended for two-way asynchronous communication between data buses; the direction of data transmission is determined by DIR input. The two enable inputs nG can beusedtodisable the device so that the buses are effectively isolat- ed. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power con- sumption. All inputs and outputs are equipped with protec- tion circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW. 74LCXH16245 LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER WITH 5V TOLERANT INPUTS AND OUTPUT (3-STATE) ORDER CODES PACKAGE TUBE T & R TSSOP 74LCXH16245TTR TSSOP PIN CONNECTION |
Podobny numer części - 74LCXH16245 |
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Podobny opis - 74LCXH16245 |
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