74LVQ32MTR datasheet(4/11 Pages) STMICROELECTRONICS

Numer części	74LVQ32MTR

Szczegółowy opis	LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE

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74LVQ32

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Table 8: AC Electrical Characteristics (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)

1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-

ing in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tPHLn|)

2) Parameter guaranteed by design

(*) Voltage range is 3.3V

± 0.3V

Table 9: Capacitive Characteristics

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without

load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)

Figure 3: Test Circuit

CL = 50pF or equivalent (includes jig and probe capacitance)

RL = 500Ω or equivalent

RT = ZOUT of pulse generator (typically 50Ω)

Symbol

Parameter

Test Condition

Value

Unit

VCC

(V)

TA = 25°C

-40 to 85°C

-55 to 125°C

Min.

Typ.

Max.

Min.

Max.

Min.

Max.

tPLH tPHL Propagation Delay

Time

2.7

.

5.8

11.0

13.0

14.0

ns

3.3(*)

5.2

8.0

9.0

10.0

tOSLH

tOSHL

Output To Output

Skew Time

(note1, 2)

2.7

0.5

1.0

ns

3.3(*)

0.5

1.0

Symbol

Parameter

Test Condition

Value

Unit

VCC

(V)

TA = 25°C

-40 to 85°C

-55 to 125°C

Min.

Typ.

Max.

Min.

Max.

Min.

Max.

CIN

Input Capacitance

3.3

4

pF

CPD

Power Dissipation

Capacitance

(note 1)

3.3

fIN = 10MHz

26

pF

Podobny numer części - 74LVQ32MTR

Producent	Numer części	Arkusz danych	Szczegółowy opis
STMicroelectronics	74LVQ32M	56Kb / 8P	QUAD 2-INPUT OR GATE February 1999

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