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ST4G3235BJR Arkusz danych(PDF) 1 Page - STMicroelectronics |
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1 / 21 page June 2007 Rev 7 1/21 21 ST4G3235 4-bit dual supply bus buffer level translator with a side series resistor Features ■ High speed: tPD = 4.3ns (Max.) at TA = 85°C VCCB = 1.65V; VCCA = 3.0V ■ Low power dissipation: ICCA = ICCB = 5µA(Max.) at TA=85°C ■ Symmetrical output impedance: |IOHA| = IOLA = 10mA Min at VCCA = 2.75V; VCCB = 1.4V to 3.6V |IOHB| = IOLB = 4mA Min at VCCB = 1.65V; VCCA = 1.4 to 3.6V) ■ Balanced propagation delays: tPLH ≅ tPHL ■ Power down protection on inputs and outputs ■ 26Ω series resistor on a side outputs ■ Operating voltage range: VCCA(Opr) = 1.4V to 3.6V VCCB(Opr) = 1.4V to 3.6V ■ Max data rates: 380Mbps (1.8V to 3.3V translation) 260Mbps (<1.8V to 3.3V translation) 260Mbps (translate to 2.5V) 210Mbps (translate to 1.5V) ■ Latch-up performance exceeds 500mA (JESD 17) ■ ESD performance: HBM > 2000V (MIL STD 883 method 3015); MM > 200V ■ ROHS compliant for Flip-Chip package Description The ST4G3235 is a dual supply low voltage CMOS 4-bit bus buffer level translator fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. Designed for use as an interface between a 3.3V bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V, 3.3V/2.5V, 1.8V/1.4V and 2.5V/1.8V supply systems, it achieves high speed operation while maintaining the CMOS low power dissipation. This IC is intended for one-way asynchronous communication between data buses. The input and output power down protections disable the device when both power supply are down, so that the buses are effectively isolated. The input tolerant buffers allow to translate VCCB compatible signals and greater signals than VCCB up/down to VCCA and viceversa. All inputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. Flip-Chip11 www.st.com Table 1. Device summary Part number Package Packaging ST4G3235BJR Flip-Chip11 4000 parts per reel |
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