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TS4601BEIJT Arkusz danych(PDF) 4 Page - STMicroelectronics |
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TS4601BEIJT Arkusz danych(HTML) 4 Page - STMicroelectronics |
4 / 28 page Typical application schematics TS4601B 4/28 2 Typical application schematics Figure 1. Typical application schematics for the TS4601B Cs 1uF C12 1uF Css 2.2uF Cs 1uF Gnd Gnd Gnd Gnd Gnd Rout 12 ohms min. Cout 0.8nF min. Gnd Cin 2.2uF Cin 2.2uF Cin 2.2uF Cin 2.2uF Gnd Gnd Vcc Vcc + - + - I2C Negative Supply Negative Reg Positive Reg PVcc Gnd C1 C2 SDA SCL Vcc InL- InL+ InR+ InR- VoutL VoutR CMS PVss B4 B3 B2 B1 A4 A3 A2 A1 C4 C3 C2 C1 D4 D3 D2 D1 SDZ TS4601 Rout 12 ohms min. Cout 0.8nF min. Gnd I2C Bus Master Standby Command Negative Left Input Negative Right Input Positive Right Input Positive Left Input Headphone / Line Out Table 3. Pin description for the TS4601B Pin number Pin name Pin definition C1 VCC Analog supply voltage, connect to Vbattery. A4 PVCC Power supply voltage, connect to Vbattery. A2 C1 Capacitor terminal for internal negative supply generator. A1 C2 Capacitor terminal for internal negative supply generator. B2 PVSS Capacitor terminal for internal negative supply generator filtering. D1 VOUTR Right audio channel output signal. B1 VOUTL Left audio channel output signal. A3 GND Ground of the device. C2 CMS Common-mode sense, to be connected as close as possible to the ground of headphone / line out plug. B4 INL- Left audio channel negative input signal. B3 INL+ Left audio channel positive input signal. D4 SDZ Master standby of the circuit. When SDZ = 0, the device is also reset to initial state. Up to VCC tolerant input. C4 INR- Right audio channel negative input signal. |
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