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STESB01DR Arkusz danych(PDF) 6 Page - STMicroelectronics |
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STESB01DR Arkusz danych(HTML) 6 Page - STMicroelectronics |
6 / 14 page Electrical characteristics STESB01 6/14 4 Electrical characteristics Table 4. Electrical characteristics (VCC = 20V, CI = 3.3µF, TJ= -40°C to 125°C unless otherwise specified.) 1 To the PWM pin must be applied a 5V to 0V falling edge while the voltage level on the VCOLL pin must be 0V. After 300 ns, to the VCOLL pin must be applied a 0V to 5V rising edge. The maximum frequency of signals applied to PWM and VCOLL pins must be 300 kHz. 2 To the PWM pin must be applied a 5V to 0V falling edge while the voltage level on the VCOLL pin must be 0V. After 200 ns, to the VCOLL pin must be applied a 0V to 5V raising edge. The maximum frequency of signals applied to PWM and VCOLL pins must be 300 kHz. 3 Guaranteed by Design. 4 In parallel to the resistor a low-leakage/low-ESR capacitor could be necessary for bypassing purpose. Symbol Parameter Test Conditions Min. Typ. Max. Unit Supply Input and Under Voltage Lock Out VCC Turn On Threshold VCC rising 7.5 8 V Turn Off Threshold after Turn On VCC falling 6.5 7 ICC Supply Current PWM=VCOLL=0V 2 mA See Note 1 2 Driver Output (TJ = 27°C) VOL Low Level Voltage IDRIVE =10mA 50 mV IDRIVE(OL) Drive Current in open loop VDRIVE = 1.25V, RSTGadj=150 kΩ See Note 2, Note 4 0.25 A Storage Control VPWML PWM Low Level Threshold See Note 3 1.5 V VPWMH PWM High Level Threshold See Note 3 3.5 V IPWM PWM input bias current PWM = 0V to 15V -0.1 0.1 µA VCOLL(L) Collector Low Level Threshold See Note 3 0.8 V VCOLL(H) Collector High Level Threshold See Note 3 2.5 V ICOLL VCOLL input bias current VCOLL = 0V to 5V -0.1 0.1 µA |
Podobny numer części - STESB01DR |
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Podobny opis - STESB01DR |
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